Texas Instruments TPS54810 Parameter Test Conditions MIN TYP MAX Unit Error Amplifier, Power Good

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TPS54810

 

 

 

www.ti.com

SLVS420B − MARCH 2002 − R EVISED FEBRUARY 2005

 

 

 

 

 

ELECTRICAL CHARACTERISTICS CONTINUED

 

 

 

 

TJ = −40°C to 125°C, VI = 4 V to 6 V unless otherwise noted

 

 

 

 

 

 

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

 

 

 

 

 

 

 

ERROR AMPLIFIER

 

 

 

 

 

 

 

 

 

 

 

 

 

Error amplifier open loop voltage gain

1 kCOMP to AGND(1)

90

110

 

dB

 

Error amplifier unity gain bandwidth

Parallel 10 k, 160 pF COMP to AGND(1)

3

5

 

MHz

 

Error amplifier common mode input voltage

Powered by internal LDO(1)

0

 

VBIAS

V

 

range

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input bias current, VSENSE

VSENSE = Vref

 

60

250

nA

 

Output voltage slew rate (symmetric), COMP

 

1.0

1.4

 

V/s

 

 

 

 

 

 

 

PWM COMPARATOR

 

 

 

 

 

 

 

 

 

 

 

 

 

PWM comparator propagation delay time, PWM

10-mV overdrive(1)

 

 

 

 

 

comparator input to PH pin (excluding dead-

 

70

85

ns

 

time)

 

 

 

 

 

 

 

 

 

 

 

 

SLOW-START/ENABLE

 

 

 

 

 

 

 

 

 

 

 

 

 

Enable threshold voltage, SS/ENA

 

0.82

1.20

1.40

V

 

 

 

 

 

 

 

 

Enable hysteresis voltage, SS/ENA (1)

 

 

0.03

 

V

 

Falling edge deglitch, SS/ENA (1)

 

 

2.5

 

s

 

Internal slow-start time

 

2.6

3.35

4.1

ms

 

 

 

 

 

 

 

 

Charge current, SS/ENA

SS/ENA = 0V

3

5

8

A

 

 

 

 

 

 

 

 

Discharge current, SS/ENA

SS/ENA = 1.3 V, VI = 1.5 V

1.5

2.3

4.0

mA

POWER GOOD

 

 

 

 

 

 

 

 

 

 

 

 

 

Power good threshold voltage

VSENSE falling

 

90

 

%Vref

 

Power good hysteresis voltage(1)

 

 

3

 

%V

 

 

 

 

 

 

ref

 

Power good falling edge deglitch(1)

 

 

35

 

s

 

Output saturation voltage, PWRGD

I(sink) = 2.5 mA

 

0.18

0.3

V

 

Leakage current, PWRGD

VI = 3.6 V

 

 

1

A

CURRENT LIMIT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

V = 4.5 V(1), output shorted

9

11

 

 

 

Current limit

I

 

 

 

A

 

V = 6 V(1), output shorted

10

12

 

 

 

 

 

 

 

I

 

 

 

 

 

Current limit leading edge blanking time

 

 

100

 

ns

 

 

 

 

 

 

 

 

Current limit total response time

 

 

200

 

ns

 

 

 

 

 

 

 

THERMAL SHUTDOWN

 

 

 

 

 

 

 

 

 

 

 

 

 

Thermal shutdown trip point(1)

 

135

150

165

_C

 

Thermal shutdown hysteresis(1)

 

 

10

 

_C

OUTPUT POWER MOSFETS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

V = 6 V(2)

 

26

47

 

rDS(on)

Power MOSFET switches

I

 

 

 

m

V = 4.5 V(2)

 

30

60

 

 

I

 

 

 

 

(1)Specified by design

(2)Matched MOSFETs, low-side rDS(on) production tested, high-side rDS(on) production tested.

4

Image 4
Contents Features Efficiency AT 700 HZOrdering Information Absolute Maximum RatingsRecommended Operating Conditions Dissipation RATINGS1Electrical Characteristics Parameter Test Conditions MIN TYP MAX Unit Error Amplifier SLOW-START/ENABLEPower Good Output Power MosfetsPWP Package TOP View Terminal Name no DescriptionFunctional Block Diagram Related DC/DC ProductsTypical Characteristics Output Voltage Regulation Error AmplifierInternal SLOW-START Time Junction Temperature Open Loop ResponseApplication Information Component Selection Input FilterFeedback Circuit Operating FrequencyPCB Layout PCB Layout Recommended Land Pattern for the 28−Pin PWP PowerPAD Layout Considerations for Thermal PerformancePerformance Graphs from Application Circuit Shown in Figure Detailed Description Switching FRE Sync PIN RT PINQuency PWM Control Package Option Addendum Packaging InformationSPQ Tape and Reel InformationTPS54810PWPR Htssop Device Package Type Page Page Page Important Notice