Chapter 1: Introduction
X8DTG-DF Motherboard Layout
J11
SBX 1A
LE4
SW1 |
|
JWD1 JSPK1 | JNMI1 J UID |
| OW |
| JPCIE3 |
VGA | COM1 |
|
|
|
|
| IPMB | LAN2 | LAN1 |
|
|
|
| |
| LE2 |
|
|
|
| Winbond | JLPC80 |
| |
|
|
| Intel | |
| 450R | JPL1 | JPG1 | |
| BMC | 82576 | ||
|
|
|
| LAN CTRL |
USB0/1
IPMI_LAN
PHY
J12
SBX 2A
+
| CMOS | |
.0 |
| CLEAR |
x4 in |
| |
Intel |
| |
x16 | ICH10R | BIOS |
Slot | (South Bridge) | Intel |
| 5520 | |
|
|
| JPCIE1 |
SBX 1B | USB2/3 |
X8DTG-DF
| P2 | P2 | P2 | P2 | P2 | P2 |
CPU2 | DIMM1B | DIMM1A | DIMM2B | DIMM2A | DIMM3B | DIMM3A |
|
|
|
|
|
|
JPCIE2 SBX 2B
FAN7 | JBAT1 |
Battery
JPW1 | P1DIMM3A | P1DIMM3B | P1DIMM2A |
|
|
|
FAN4
JPI2C (PWR I2C)
P1 DIMM2B
P1 DIMM1A
P1 DIMM1B
CPU1 |
FAN3
FAN6 FAN5 |
|
Front Panel CTRL |
|
LE1 |
|
JPW2 |
|
JPW3 |
|
FAN1 |
|
FAN2 | 4 |
JL1 | 1 |
|
Notes:
1.Jumpers not indicated are for test purposes only. For more information on jumpers or components, refer to Chapter 2.
2." " indicates the location of Pin 1.
3.When LE1 LED is on, the onboard power connection is on. Make sure to unplug the power cables before removing or installing components.