Built upon the functionality and the capability of the 5500 Series Processor, the X8DTG-DF motherboard provides the performance and feature set required for dual-processor-based systems with configuration optimized for intensive applica- tions, High Performance Computing (HPC)/Cluster IU server platforms. The Intel 5520 platform consists of the 5500 Series (LGA 1366) processor, the 5520 (IOH- 36D), and the ICH10R (South Bridge). With the Intel QuickPath interconnect (QPI) controller built in, the 5500 Series Processor platform is the first dual-processing platform to offer the next generation point-to-point system interconnect that re- places the current Front Side Bus Technology, substantially enhancing system performance by utilizing serial link interconnections with increased bandwidth and scalability.
The IOH connects to each processor through an independent QPI (QuickPath interconnect) link. Each link consists of 20 pairs of unidirectional differential lanes for transmission and receiving in addition to a differential forwarded clock. A full- width QPI link pair provides 84 signals. Each processor supports two QuickPath links, one going to the other processor and the other to the 5520 chips.
The 5520 chipset supports PCI Express Gen2 lanes peer-to-peer read and write transactions. The ICH10R provides multiple PCI-Express SATA and USB con- nections.
In addition, the 5520 platform also offers a wide range of RAS (Reliability, Avail- ability and Serviceability) features. These features include memory interface ECC, x4/x8 Single Device Data Correction (SDDC), Cyclic Redundancy Check (CRC), parity protection, out-of-band register access via SMBus, memory mirroring, memory sparing, and Hot-plug support on the PCI-Express Interface.
Main Features of the 5500 Series Processor and the 5520 Chipset
• Four processor cores in each processor with 8MB shared cache among cores
• Two full-width Intel QuickPath interconnect links, up to 6.4 GT/s of data transfer rate in each direction
• Virtualization Technology, Integrated Management Engine supported
• Point-to-point cache coherent interconnect, Fast/narrow unidirectional links, and Concurrent bi-directional traffic
Chapter 1: Introduction