Chapter 2: Installation
Chassis Intrusion
A Chassis Intrusion header is located at JL1 on the motherboard. Attach an appropriate cable from the chassis to inform you of a chassis intrusion when the chassis is opened.
T-SGPIO Headers
Two SGPIO
Chassis Intrusion
Pin Definitions (JL1)
Pin# Definition
1Intrusion Input
2Ground
T-SGPIO
Pin Definitions
Pin# |
| Definition | Pin |
| Definition |
1 |
| NC | 2 |
| NC |
|
| ||||
3 |
| Ground | 4 |
| Data |
|
| ||||
5 |
| Load | 6 |
| Ground |
|
| ||||
7 |
| NC |
|
| NC |
| 8 |
| |||
|
|
|
|
|
|
Note: NC= No Connections
LE4
J11 | SW1 |
| |
JWD1 JSPK1 | JNMI1 J_UID_OW | ||
SBX 1A | |||
|
| JPCIE3 | |
|
|
VGA |
| COM1 |
|
|
|
|
|
| LAN2 | LAN1 | USB0/1 |
| |
| LE2 | IPMB |
|
|
| J12 |
|
|
|
| IPMI_LAN | SBX | |
|
| JLPC80 |
|
| PHY | 2A |
| Winbond |
| Intel |
| ||
| 450R | JPG1 JPL1 |
|
|
| |
| BMC |
| 82576 |
| + | |
|
|
|
| LAN CTRL |
|
|
| CMOS |
|
|
|
| |
| CLEAR |
|
|
|
| |
Intel |
|
|
|
|
|
|
ICH10R | BIOS |
|
|
|
|
|
(South Bridge) |
| Intel |
|
| ||
|
|
|
| |||
|
|
| 5520 |
|
| |
|
|
|
|
|
A. Chassis Intrusion
B.T-SGPIO0
C.T-SBPIO1
JPCIE1 |
| |
SBX 1B | USB2/3 | |
|
| |
|
| |
B |
| |
| ||
C |
| |
FAN8 |
|
|
FAN7
| P2 | P2 | P2 | P2 | P2 | P2 |
CPU2 | DIMM1B | DIMM1A | DIMM2B | DIMM2A | DIMM3B | DIMM3A |
|
|
|
|
|
|
JBAT1
Battery
JPCIE2 SBX 2B
JPW1 | P1DIMM3A | P1DIMM3B | P1DIMM2A |
|
|
| |
FAN4 |
|
|
|
JPI2C (PWR I2C)
P1 DIMM2B
P1 DIMM1A
P1 DIMM1B
CPU1 |
FAN3
FAN6 FAN5 |
|
Front PanelCTRL |
|
LE1 |
|
JPW2 |
|
JPW3 |
|
FAN1 |
|
FAN2 | 4 |
JL1 | A1 |