1.GENERAL DESCRIPTION
•The
•The
outputs.
•The
1.1.ENCODER INTERFACE
Note: Each of the registers IPC, XPC and SPR, mentioned below, represents an unsigned integer 24 bit number ranging from 0 to 16777215. In case the user needs also negative values, he should refer to 16777215 as
Each Encoder Interface includes the following elements:
1.1.1.IPC
The IPC (Internal Position Counter) is updated continuously according to the input from user's encoders.
The updating of the IPC is affected by the Clock Resolution, that may be set to 1, 2 or 4 Clocks/Cycle.
1.1.2.SOFTWARE OUTPUTS
a.The XPC (eXternal Position Counter) is a latch counter being equalized to the IPC upon user's request – either via PC’s software, or by a hardware
b."Event Signal" – produced when a
This software Event Signal is supplied also in the hardware outputs as described in section 1.2.2 / ii. The user may select one of the following as the
•IPC = SPR
Each Encoder Interface includes an SPR (Set Point Register) being adjustable by the user.
In case the user selects this condition, an event occurs when IPC = SPR.
•IPC Overflow
In case the user selects this condition, an event occurs when there's overflow in the IPC, that is, IPC changes from 16777215 to 0, or vice versa.
•Index
In case the user selects this condition, an event occurs when an index (marker) signal arrives from user's encoder.
3