Cypress CY24271, CY24272 manual Document History, REV ECN no, Kvm/Aesa

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CY24272

Document History Page

Document Title: CY24272 RambusXDRClock Generator with Zero SDA Hold Time

Document Number: 001-42414

REV.

ECN NO.

Issue

Orig. of

Description of Change

Date

Change

 

 

 

 

 

 

 

 

**

1749003

See ECN

KVM/AESA

New data sheet

 

 

 

 

No 8 or 15/2 multipliers or 133MHz * 4 option

 

 

 

 

Max frequency is 667MHz

© Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Document Number: 001-42414 Rev. **

Revised November 9, 2007

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PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trademarks and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations. Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. Spread Aware is a trademark of Cypress Semiconductor Corporation. Rambus is a registered trademark, and XDR is a trademark, of Rambus Inc. All products and company names mentioned in this document may be the trademarks of their respective holders.

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Contents Logic Block Diagram FeaturesDevice Comparison CY24271 CY24272 PLLPin Definition 28 Pin Tssop Pin No Name Description PinoutsPLL Multiplier Input Clock SignalModes of Operation SMBus Protocol Device ID and SMBus Device AddressSMBus Data Byte Definitions BypassCommand Code 81h Bit Register Command Code 80h5 Bit RegisterCommand Code 82h Bit Register PODRefclkb Absolute Maximum ConditionsVTH Parameter Description Condition Min Max UnitDC Operating Conditions AC Operating Conditions DC Electrical SpecificationsParameter Description Min Typ Max Unit AC Electrical Specification Signal Waveforms Test and Measurement SetupJitter Parameter Value UnitCrossing Point Voltage Input and Output WaveformsOrdering Information Package Drawing and DimensionPart Number Package Type Product Flow Pb-Free CY24272ZXCTREV ECN no Document HistoryKVM/AESA