Cypress STK12C68-5 manual Features, Functional Description, Logic Block Diagram

STK12C68-5 (SMD5962-94599)

64 Kbit (8K x 8) AutoStore nvSRAM

Features

■35 ns and 55 ns access times

■Hands off automatic STORE on power down with external 68 µF capacitor

■STORE to QuantumTrap™ nonvolatile elements is initiated by software, hardware, or AutoStore™ on power down

■RECALL to SRAM initiated by software or power up

■Unlimited Read, Write, and Recall cycles

■1,000,000 STORE cycles to QuantumTrap

■100 year data retention to QuantumTrap

■Single 5V+10% operation

■Military temperature

■28-pin (300mil) CDIP and 28-pad LCC packages

Functional Description

The Cypress STK12C68-5 is a fast static RAM with a nonvol- atile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers from the SRAM to the nonvolatile elements (the STORE operation) takes place automatically at power down. On power up, data is restored to the SRAM (the RECALL operation) from the nonvolatile memory. Both the STORE and RECALL operations are also available under software control. A hardware STORE is initiated with the HSB pin.

Logic Block Diagram

A5

A6

Quantum Trap

128 X 512

STORE

VCC VCAP

POWER

CONTROL

A7

A8

A9

A11 A12

ROW DECODER

STATIC RAM

ARRAY

128 X 512

RECALL

STORE/
RECALL
			HSB
CONTROL
	SOFTWARE			A0 - A12
		DETECT

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

COLUMN I/O

BUFFERS		COLUMN DEC
INPUT	A	0 A1 A2 A3 A4 A10

OE

CE

WE

Cypress Semiconductor Corporation • 198 Champion Court	•	San Jose, CA 95134-1709	•	408-943-2600
Document Number: 001-51026 Rev. **		Revised March 02, 2009

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