Cypress CY7C1350G Selection Guide, Pin Configurations, MHz 200 MHz 166 MHz 133 MHz 100 MHz Unit

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CY7C1350G

Selection Guide

	250 MHz	200 MHz	166 MHz	133 MHz	100 MHz	Unit
Maximum Access Time	2.6	2.8	3.5	4.0	4.5	ns

Maximum Operating Current	325	265	240	225	205	mA

Maximum CMOS Standby Current	40	40	40	40	40	mA

Pin Configurations

100-Pin TQFP Pinout

BYTE C

BYTE D

DQPC

DQC

DQC

VDDQ

VSS

DQC

DQC

DQC

DQC

VSS

VDDQ

DQC

DQC

NC

VDD

NC

VSS

DQD

DQD

VDDQ

VSS

DQD

DQD

DQD

DQD

VSS

VDDQ

DQD

DQD

DQPD

	A	A			CE		CE			BW		BW		BW		BW		CE		V			V		CLK			WE		CEN		OE		ADV/LD		NC/18M		NC/9M			A	A


					1		2			D		C		B		A		3			DD		SS
																					DD		SS



100		99			98		97			96		95		94		93		92		91			90		89			88		87		86	85			84		83		82		81
1																																										80
2																																										79
3																																										78
4																																										77
5																																										76
6																																										75
7																																										74
8																																										73
9																																										72
10																																										71
11																																										70
12																																										69
13																		CY7C1350G																								68
14																		CY7C1350G																								67
14																																										67
15																																										66
16																																										65
17																																										64
18																																										63
19																																										62
20																																										61
21																																										60
22																																										59
23																																										58
24																																										57
25																																										56
26																																										55
27																																										54
28																																										53
29																																										52
30																																										51
31		32			33		34			35		36		37		38		39		40			41		42			43		44		45	46			47		48		49		50


MODE		A			A		A			A		A		A		NC/288M		NC/144M		V			V			NC/72M		NC/36M		A		A		A			A	A		A		A
												1		0							SS		DD

DQPB

DQB DQB

VDDQ

VSS

DQB DQB DQB DQB

VSS

VDDQ

DQB DQB

VSS

NC

VDD

ZZ

DQA DQA

VDDQ

VSS

DQA DQA DQA DQA

VSS

VDDQ

DQA DQA DQPA

BYTE B

BYTE A

Document #: 38-05524 Rev. *F

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Contents Cypress Semiconductor Corporation FeaturesLogic Block Diagram Champion Court San Jose , CA Document # 38-05524 Rev. *FCY7C1350G Pin ConfigurationsSelection Guide 250 MHz 200 MHz 166 MHz 133 MHz 100 MHz UnitName Description Pin Configurations Ball BGA PinoutPin Definitions Byte Write Inputs, active LOW . Qualified withFunctional Overview Interleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDOperation Address Used ZZ Mode Electrical CharacteristicsPartial Truth Table for Read/Write 2, 3 FunctionOperating Range Electrical Characteristics Over the Operating Range10Maximum Ratings Ambient RangeAC Test Loads and Waveforms Capacitance12Thermal Resistance Parameter Description Test Conditions Tqfp 119 BGA Unit MaxSwitching Characteristics Over the Operating Range17 CEN Switching WaveformsRead/Write Timing19, 20 Address A1 A2ZZ Mode Timing23 NOP, STALL, and Deselect Cycles19, 20Ordering Information Package Diagrams Pin Tqfp 14 x 20 x 1.4 mmBall BGA 14 x 22 x 2.4 mm Issue Orig. Description of Change Date Document History