Cypress CY14B108K Truth Table For Sram Operations, For x8 Configuration, For x16 Configuration

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PRELIMINARY

CY14B108K, CY14B108M

Truth Table For SRAM Operations

should remain HIGH for SRAM Operations.

HSB

For x8 Configuration

CE

WE

OE

Inputs and Outputs[2]

Mode

Power

H

X

X

High Z

Deselect/Power Down

Standby

L

H

L

Data Out (DQ0–DQ7);

Read

Active

L

H

H

High Z

Output Disabled

Active

L

L

X

Data in (DQ0–DQ7);

Write

Active

For x16 Configuration

CE

WE

OE

BHE

[3]

BLE

[3]

Inputs and Outputs[2]

Mode

Power

H

X

X

X

X

High-Z

Deselect/Power Down

Standby

L

X

X

H

H

High-Z

Output Disabled

Active

L

H

L

L

L

Data Out (DQ0–DQ15)

Read

Active

L

H

L

H

L

Data Out (DQ0–DQ7);

Read

Active

DQ8–DQ15in High-Z

L

H

L

L

H

Data Out (DQ8–DQ15);

Read

Active

DQ0–DQ7in High-Z

L

H

H

L

L

High-Z

Output Disabled

Active

L

H

H

H

L

High-Z

Output Disabled

Active

L

H

H

L

H

High-Z

Output Disabled

Active

L

L

X

L

L

Data In (DQ0–DQ15)

Write

Active

L

L

X

H

L

Data In (DQ0–DQ7);

Write

Active

DQ8–DQ15in High-Z

L

L

X

L

H

Data In (DQ8–DQ15);

Write

Active

DQ0–DQ7in High-Z

Document #: 001-47378 Rev. **

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Contents Features Logic Block Diagram1, 2Functional Description Cypress Semiconductor CorporationPinouts Device Operation Sram ReadSram Write AutoStore OperationHardware Recall Power Up Hardware Store HSB OperationSoftware Recall Software StoreMode Selection A15 A05 Mode PowerPreventing AutoStore StoreData Protection Best Practices Noise ConsiderationsReal Time Clock Operation Alarm Watchdog TimerCalibrating the Clock Power Monitor Interrupt RegisterInterrupts Flags RegisterWDF Watchdog Timer Flag PF Power Fail FlagPFE Power Fail Enable AF Alarm FlagOscen WDSWDF Oscf 0xFFFF9 0x7FFF9 Time Keeping Seconds For the register is 0 to0xFFFF5 0x7FFF5 Alarm Day Time-baseWrite only. Reading it always returns a 0xFFFF6 0x7FFF6 Interrupt Status/Control0xFFFF2 0x7FFF2 Alarm Seconds Centuries 0xFFFF0 0x7FFF0 FlagsWatchdog This condition and write 0 to clear this flagDC Electrical Characteristics Range Ambient TemperatureMaximum Ratings Operating RangeData Retention and Endurance CapacitanceThermal Resistance AC Test ConditionsRTC Backup Current Hot Temperature 85 oCRTC Battery Pin Voltage RTC Capacitor Pin Voltage TOCS RTC Oscillator Time to StartAC Switching Characteristics Switching WaveformsParameters Sram Read Cycle Sram Write CycleData Output High Impedance Output Data Valid Standby ActiveAddress Address Valid Data Input Input Data ValidData Input Data Output Input Data Valid High ImpedanceNot applicable for RTC register writes Data Input Input Data Valid High Impedance Data OutputAutoStore/Power Up Recall Parameters Description 20 ns 25 ns 45 ns Unit Min MaxSoftware Controlled Store and Recall Cycle To Output Active Time when write latch not set Hardware Store CycleDescription 20 ns 25 ns 45 ns Unit Min Hardware Store Pulse WidthFor x8 Configuration For x16 ConfigurationInputs and Outputs Mode Power Truth Table For Sram OperationsPart Numbering Nomenclature CY14 B 108 K ZS P 20 X C T ZS TsopNvsram Ordering Information Package Diagrams Pin Tsop II51-85160 Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsNew Data Sheet Document History