Cypress CY62158EV30 manual Document History, Issue Date Orig. Description of Change

Page 11

CY62158EV30 MoBL

Document History Page

Document Title: CY62158EV30 MoBL, 8-Mbit (1024K x 8) Static RAM

Document Number: 38-05578

REV.

ECN NO.

Issue Date

Orig. of

Description of Change

Change

 

 

 

 

 

 

 

 

 

**

270329

See ECN

PCI

New Data Sheet

 

 

 

 

 

*A

291271

See ECN

SYT

Converted from Advance Information to Preliminary

 

 

 

 

Changed ICCDR from 4 to 4.5 A

*B

444306

See ECN

NXR

Converted from Preliminary to Final.

 

 

 

 

Removed 35 ns speed bin

 

 

 

 

Removed “L” bin.

 

 

 

 

Removed 44 pin TSOP II package

 

 

 

 

Included 48 pin TSOP I package

 

 

 

 

Changed the ICC Typ value from 16 mA to 18 mA and ICC max value from 28

 

 

 

 

mA to 25 mA for test condition f = fax = 1/tRC.

 

 

 

 

Changed the ICC max value from 2.3 mA to 3 mA for test condition f = 1MHz.

 

 

 

 

Changed the ISB1 and ISB2 max value from 4.5 A to 8 A and Typ value from

 

 

 

 

0.9 A to 2 A respectively.

 

 

 

 

Updated Thermal Resistance table

 

 

 

 

Changed Test Load Capacitance from 50 pF to 30 pF.

 

 

 

 

Added Typ value for ICCDR .

 

 

 

 

Changed the ICCDR max value from 4.5 A to 5 A

 

 

 

 

Corrected tR in Data Retention Characteristics from 100 s to tRC ns

 

 

 

 

Changed tLZOE from 3 to 5

 

 

 

 

Changed tLZCE from 6 to 10

 

 

 

 

Changed tHZCE from 22 to 18

 

 

 

 

Changed tPWE from 30 to 35

 

 

 

 

Changed tSD from 22 to 25

 

 

 

 

Changed tLZWE from 6 to 10

 

 

 

 

Updated the ordering Information and replaced the Package Name column with

 

 

 

 

Package Diagram.

*C

467052

See ECN

NXR

Included 44 pin TSOP II package in Product Offering.

 

 

 

 

Removed TSOP I package; Added reference to CY62157EV30 TSOP I

 

 

 

 

Updated the ordering Information table

*D

1015643

See ECN

VKN

Added footnote #8 related to ISB2 and ICCDR

Document #: 38-05578 Rev. *D

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Contents Champion Court San Jose , CA Document # 38-05578 Rev. *D FeaturesLogic Block Diagram Functional Description Cypress Semiconductor CorporationPin Tsopii Pin ConfigurationsProduct Portfolio Ball VfbgaCapacitance9 Electrical Characteristics Over the Operating RangeMaximum Ratings Operating RangeData Retention Waveform Data Retention Characteristics Over the Operating RangeThermal Resistance9 AC Test Loads and WaveformsWrite Cycle Parameter Description 45 ns Unit MinRead Cycle Read Cycle No OE Controlled16 Switching WaveformsRead Cycle No Address Transition Controlled15 Write Cycle No CE1 or CE2 Controlled14, 18 Write Cycle No WE Controlled14, 18Write Cycle No WE Controlled, OE LOW19 Inputs/Outputs Mode PowerTruth Table Ordering InformationBall Vfbga 6 x 8 x 1 mm Package DiagramsPin Tsop II Document History Issue Date Orig. Description of Change