Cypress CY62158EV30 manual Package Diagrams, Ball Vfbga 6 x 8 x 1 mm

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CY62158EV30 MoBL→

Package Diagrams

Figure 1. 48-Ball VFBGA (6 x 8 x 1 mm), 51-85150

TOP VIEW

BOTTOM VIEW

A1 CORNER

8.00±0.10

A

B

0.25 C

0.55 MAX.

A

B

C

D

E

F

G

H

A1 CORNER

1 2 3 4 5 6

6.00±0.10

0.21±0.05

0.10 C

8.00±0.10

5.25

0.75

2.625

A

B

0.15(4X)

Ø0.05 M C Ø0.25 M C A B Ø0.30±0.05(48X)

6 5 4 3 2 1

A

B

C

D

E

F

G

H

1.875

0.75

3.75

6.00±0.10

 

SEATING PLANE

0.26 MAX.

C

1.00 MAX

51-85150-*D

Document #: 38-05578 Rev. *D

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Contents Logic Block Diagram Functional Description FeaturesCypress Semiconductor Corporation Champion Court San Jose , CA Document # 38-05578 Rev. *DProduct Portfolio Pin ConfigurationsBall Vfbga Pin TsopiiMaximum Ratings Electrical Characteristics Over the Operating RangeOperating Range Capacitance9Thermal Resistance9 Data Retention Characteristics Over the Operating RangeAC Test Loads and Waveforms Data Retention WaveformParameter Description 45 ns Unit Min Read CycleWrite Cycle Switching Waveforms Read Cycle No Address Transition Controlled15Read Cycle No OE Controlled16 Write Cycle No CE1 or CE2 Controlled14, 18 Write Cycle No WE Controlled14, 18Truth Table Inputs/Outputs Mode PowerOrdering Information Write Cycle No WE Controlled, OE LOW19Ball Vfbga 6 x 8 x 1 mm Package DiagramsPin Tsop II Document History Issue Date Orig. Description of Change
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