Cypress CY14B256K manual AC Switching Characteristics, Parameter Sram Read Cycle

Page 17

CY14B256K

AC Switching Characteristics

Parameter		Description	25 ns		35 ns		45 ns		Unit
Cypress	Alt.	Description	Min	Max	Min	Max	Min	Max	Unit
Parameter	Parameter		Min	Max	Min	Max	Min	Max
Parameter	Parameter
SRAM Read	Cycle

tACE	tELQV	Chip Enable Access Time		25		35		45	ns
tRC [10]	tAVAV, tELEH	Read Cycle Time	25		35		45		ns
tAA [11]	tAVQV	Address Access Time		25		35		45	ns
tDOE	tGLQV	Output Enable to Data Valid		12		15		20	ns
tOHA [11]	tAXQX	Output Hold After Address Change	3		3		3		ns
tLZCE [12]	tELQX	Chip Enable to Output Active	3		3		3		ns
tHZCE [12]	tEHQZ	Chip Disable to Output Inactive		10		13		15	ns
tLZOE [12]	tGLQX	Output Enable to Output Active	0		0		0		ns
tHZOE [12]	tGHQZ	Output Disable to Output Inactive		10		13		15	ns
tPU [13]	tELICCH	Chip Enable to Power Active	0		0		0		ns
tPD [13]	tEHICCL	Chip Disable to Power Standby		25		35		45	ns

Figure 8. SRAM Read Cycle 1: Address Controlled [10, 11, 14]

$''5(66

W5&

W$$

W2+$

'4'$7$287

'$7$9$/,'

Figure 9. SRAM Read Cycle 2: CE and OE Controlled [10, 14]

$''5(66

&(

2(

'4'$7$287

,&&

W5&

W$&(

W/=&(

W'2(

W/=2(

W38 $&7,9(

67$1'%<

W3'

W+=&(

W+=2(

'$7$9$/,'

Notes

10.WE is HIGH during SRAM Read Cycles.

11.Device is continuously selected with CE and OE both Low.

12.Measured ±200 mV from steady state output voltage.

13.These parameters are guaranteed by design and are not tested.

14.HSB must remain HIGH during READ and WRITE cycles.

Document Number: 001-06431 Rev. *H

Page 17 of 28

[+] Feedback

Image 17

Contents Logic Block Diagram FeaturesFunctional Description Cypress Semiconductor Corporation 198 Champion CourtPin Definitions Pin ConfigurationsHardware Store HSB Operation Device OperationAutoStore Operation Software Store Hardware Recall Power UpSoftware Recall Data ProtectionCurrent versus Cycle Time Low Average Active Power Best PracticesMode Selection A13-A0 Power Real Time Clock Operation Calibrating the Clock AlarmWatchdog Timer Interrupts Power MonitorInterrupt Register Flags RegisterInterrupt Block Diagram WDF Oscf RTC Register Map5 BCD Format Data Function/RangeTime Keeping Months 0x7FFE 10s Month Register Map Detail Time Keeping Years 0x7FFF 10s YearsDate Time Keeping Hours 0x7FFB Time Keeping Minutes 0x7FFARegister Map Detail Calibration/Control 0X7FF8 Alarm Day 0x7FF50x7FF7 Interrupt Status/Control 0x7FF6To ignore the hours value Alarm Minutes 0x7FF3 Register Map Detail Alarm Hours 0x7FF4 10s Alarm HoursAlarm Seconds 0x7FF2 When the Flags register is read or on power-upMaximum Ratings DC Electrical CharacteristicsOperating Range RangeCapacitance Data Retention and EnduranceThermal Resistance AC Test ConditionsParameter Sram Read Cycle AC Switching CharacteristicsDescription 25 ns 35 ns 45 ns Min Max Unit Sram Write Cycle Parameter Cypress AltParameter Description CY14B256K Unit Min Max AutoStore or Power Up RecallParameter Alt Description 25 ns 35 ns 45 ns Unit Min Max Software Controlled STORE/RECALL Cycles 20Hardware Store Cycle Soft Sequence CommandsTruth Table For Sram Operations RTC CharacteristicsInputs and Outputs Mode Power Part Numbering Nomenclature CY 14 B 256 K SP 25 X C T Ordering Information Pin Shrunk Small Outline Package Package DiagramsOrig. of Change Submission Description of Change Date Document HistoryUpdated Reading the clock, Backup Power, Stopping Updated Features sectionStarting the Oscillator and Alarm descriptions under RTC Added default values to RTC Register Map tableUSB Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions