Cypress CY14B256K manual Low Average Active Power Best Practices, Current versus Cycle Time

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CY14B256K

Low Average Active Power

Best Practices

CMOS technology provides the CY14B256K the benefit of drawing significantly less current when it is cycled at times longer than 50 ns. Figure 3 shows the relationship between ICC and READ and/or WRITE cycle time. Worst case current consumption is shown for commercial temperature range, VCC = 3.6V, and chip enable at maximum frequency. Only standby current is drawn when the chip is disabled. The overall average current drawn by the CY14B256K depends on the following items:

1.1The duty cycle of chip enable

2.The overall cycle rate for accesses

3.The ratio of READs to WRITEs

4.The operating temperature

5.The VCC level

6.IO loading

Figure 3. Current versus Cycle Time

nvSRAM products have been used effectively for over 15 years. While ease-of-use is one of the product’s main system values, experience gained working with hundreds of applications has resulted in the following suggestions as best practices:

■The nonvolatile cells in an nvSRAM are programmed on the test floor during final test and quality assurance. Incoming inspection routines at customer or contract manufacturer’s sites sometimes reprograms these values. Final NV patterns are typically repeating patterns of AA, 55, 00, FF, A5, or 5A. The end product’s firmware should not assume that an NV array is in a set programmed state. Routines that check memory content values to determine first time system configuration and cold or warm boot status must always program a unique NV pattern (for example, complex 4-byte pattern of 46 E6 49 53 hex or more random bytes) as part of the final system manufac- turing test to ensure these system routines work consistently.

■The OSCEN bit in the Calibration register at 0x7FF8 should be set to 1 to preserve battery life when the system is in storage (see Stopping and Starting the Oscillator on page 7).

■The Vcap value specified in this data sheet includes a minimum and a maximum value size. The best practice is to meet this requirement and not exceed the maximum Vcap value because the higher inrush currents may reduce the reliability of the internal pass transistor. Customers who want to use a larger Vcap value to make sure there is extra store charge should discuss their Vcap size selection with Cypress.

Document Number: 001-06431 Rev. *H

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Contents Logic Block Diagram FeaturesFunctional Description Cypress Semiconductor Corporation 198 Champion CourtPin Definitions Pin ConfigurationsHardware Store HSB Operation Device OperationAutoStore Operation Software Store Hardware Recall Power UpSoftware Recall Data ProtectionCurrent versus Cycle Time Low Average Active Power Best PracticesMode Selection A13-A0 Power Real Time Clock Operation Calibrating the Clock AlarmWatchdog Timer Interrupts Power MonitorInterrupt Register Flags RegisterInterrupt Block Diagram WDF Oscf RTC Register Map5 BCD Format Data Function/RangeTime Keeping Months 0x7FFE 10s Month Register Map Detail Time Keeping Years 0x7FFF 10s YearsDate Time Keeping Hours 0x7FFB Time Keeping Minutes 0x7FFARegister Map Detail Calibration/Control 0X7FF8 Alarm Day 0x7FF50x7FF7 Interrupt Status/Control 0x7FF6To ignore the hours value Alarm Minutes 0x7FF3 Register Map Detail Alarm Hours 0x7FF4 10s Alarm HoursAlarm Seconds 0x7FF2 When the Flags register is read or on power-upMaximum Ratings DC Electrical CharacteristicsOperating Range RangeCapacitance Data Retention and EnduranceThermal Resistance AC Test ConditionsParameter Sram Read Cycle AC Switching CharacteristicsDescription 25 ns 35 ns 45 ns Min Max Unit Sram Write Cycle Parameter Cypress AltParameter Description CY14B256K Unit Min Max AutoStore or Power Up RecallParameter Alt Description 25 ns 35 ns 45 ns Unit Min Max Software Controlled STORE/RECALL Cycles 20Hardware Store Cycle Soft Sequence CommandsTruth Table For Sram Operations RTC CharacteristicsInputs and Outputs Mode Power Part Numbering Nomenclature CY 14 B 256 K SP 25 X C T Ordering Information Pin Shrunk Small Outline Package Package DiagramsOrig. of Change Submission Description of Change Date Document HistoryUpdated Reading the clock, Backup Power, Stopping Updated Features sectionStarting the Oscillator and Alarm descriptions under RTC Added default values to RTC Register Map tableUSB Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions
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