Cypress CY14B256K manual Hardware Store Cycle, Soft Sequence Commands

Page 21

 

 

 

 

 

 

 

 

CY14B256K

 

 

 

 

 

 

 

 

 

Hardware STORE Cycle

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

Alt.

 

 

Description

 

CY14B256K

 

Unit

Parameter

 

 

Min

 

Max

 

tDELAY [22]

 

Time Allowed to Complete SRAM Cycle

1

 

70

 

μs

tPHSB

tHLHX

Hardware STORE Pulse Width

15

 

 

 

ns

Figure 15. Hardware STORE Cycle

+6% ,1

+6% 287

W3+6%+/+;

W+/%/

W6725(

+,*+,03('$1&(

+,*+,03('$1&(

W'(/$<

'4 '$7$287 '$7$9$/,'

'$7$9$/,'

Soft Sequence Commands

Parameter

Description

 

CY14B256K

Unit

Min

 

Max

 

 

 

 

tSS [23, 24]

Soft Sequence Processing Time

 

 

70

μs

Figure 16. Soft Sequence Processing [23, 24]

 

6RIW6HTXHQFH

W66

6RIW6HTXHQFH

W66

 

&RPPDQG

 

 

&RPPDQG

 

 

$GGUHVV

$GGUHVV

$GGUHVV

$GGUHVV

$GGUHVV

 

 

W6$

 

W&:

 

W&:

 

&(

 

 

 

 

 

 

9&&

 

 

 

 

 

 

Notes

22.Read and Write cycles in progress before HSB are given this amount of time to complete.

23.This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command.

24.Commands such as STORE and RECALL lock out IO until operation is complete which further increases this time. See specific command.

Document Number: 001-06431 Rev. *H

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Contents Logic Block Diagram FeaturesFunctional Description Cypress Semiconductor Corporation 198 Champion CourtPin Definitions Pin ConfigurationsDevice Operation AutoStore OperationHardware Store HSB Operation Software Store Hardware Recall Power UpSoftware Recall Data ProtectionCurrent versus Cycle Time Low Average Active Power Best PracticesMode Selection A13-A0 Power Real Time Clock Operation Alarm Watchdog TimerCalibrating the Clock Interrupts Power MonitorInterrupt Register Flags RegisterInterrupt Block Diagram WDF Oscf RTC Register Map5 BCD Format Data Function/RangeTime Keeping Months 0x7FFE 10s Month Register Map Detail Time Keeping Years 0x7FFF 10s YearsDate Time Keeping Hours 0x7FFB Time Keeping Minutes 0x7FFARegister Map Detail Calibration/Control 0X7FF8 Alarm Day 0x7FF50x7FF7 Interrupt Status/Control 0x7FF6To ignore the hours value Alarm Minutes 0x7FF3 Register Map Detail Alarm Hours 0x7FF4 10s Alarm HoursAlarm Seconds 0x7FF2 When the Flags register is read or on power-upMaximum Ratings DC Electrical CharacteristicsOperating Range RangeCapacitance Data Retention and EnduranceThermal Resistance AC Test ConditionsParameter Sram Read Cycle AC Switching CharacteristicsDescription 25 ns 35 ns 45 ns Min Max Unit Sram Write Cycle Parameter Cypress AltParameter Description CY14B256K Unit Min Max AutoStore or Power Up RecallParameter Alt Description 25 ns 35 ns 45 ns Unit Min Max Software Controlled STORE/RECALL Cycles 20Hardware Store Cycle Soft Sequence CommandsRTC Characteristics Inputs and Outputs Mode PowerTruth Table For Sram Operations Part Numbering Nomenclature CY 14 B 256 K SP 25 X C T Ordering Information Pin Shrunk Small Outline Package Package DiagramsOrig. of Change Submission Description of Change Date Document HistoryUpdated Reading the clock, Backup Power, Stopping Updated Features sectionStarting the Oscillator and Alarm descriptions under RTC Added default values to RTC Register Map tableSales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB