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| CY14B101L | |
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AutoStore or Power Up RECALL |
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Parameter | Alt |
| Description | CY14B101L |
| Unit | |
| Min | Max |
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tHRECALL [13] | tRESTORE |
| Power up RECALL Duration |
| 20 |
| ms |
tSTORE [14, 15] | tHLHZ |
| STORE Cycle Duration |
| 12.5 |
| ms |
VSWITCH |
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| Low Voltage Trigger Level |
| 2.65 |
| V |
tVCCRISE |
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| VCC Rise Time | 150 |
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| μs |
Switching Waveforms
Figure 9. AutoStore/Power Up RECALL
| STORE occurs only | No STORE occurs |
VCC | if a SRAM write | without atleast one |
has happened | SRAM write |
VSWITCH |
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tVCCRISE |
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AutoStore | tSTORE |
tSTORE |
tHRECALL
tHRECALL
Read & Write Inhibited
Note Read and Write cycles are ignored during STORE, RECALL, and while Vcc is below VSWITCH
Notes
13.tHRECALL starts from the time VCC rises above VSWITCH.
14.If an SRAM WRITE has not taken place since the last nonvolatile cycle, no STORE will take place.
15.Industrial Grade devices requires 15 ms max.
Document Number: | Page 11 of 18 |
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