Cypress CY14B101L manual Software Controlled STORE/RECALL Cycle

								CY14B101L
Software Controlled STORE/RECALL Cycle
The software controlled STORE/RECALL cycle follows. [16, 17]
Parameter	Alt		Description	25 ns		35 ns		45 ns		Unit
				Min	Max	Min	Max	Min	Max
tRC[17]	tAVAV	STORE/RECALL Initiation Cycle Time		25		35		45		ns
tSA	tAVEL	Address Setup Time		0		0		0		ns
tCW	tELEH	Clock Pulse Width		20		25		30		ns
tHA	tGHAX, tELAX	Address Hold Time		1		1		1		ns
tRECALL		RECALL Duration			120		120		120	μs

Switching Waveforms

Figure 10. CE Controlled Software STORE/RECALL Cycle [17]

ADDRESS

CE

OE

DQ (DATA)

tRC

ADDRESS # 1

tSA tSCE

tHA

DATA VALID

tRC

ADDRESS # 6

tSTORE / tRECALL

HIGH IMPEDANCE

DATA VALID

Figure 11. OE Controlled Software STORE/RECALL Cycle [17]

ADDRESS

CE

OE

tRC

ADDRESS # 1

tSA tSCE

tHA

tRC

ADDRESS # 6

tSTORE / tRECALL

DQ (DATA) DATA VALID

DATA VALID HIGH IMPEDANCE

Notes

16.The software sequence is clocked on the falling edge of CE controlled READs or OE controlled READs.

17.The six consecutive addresses must be read in the order listed in the Mode Selection table. WE must be HIGH during all six consecutive cycles.

Document Number: 001-06400 Rev. *I Page 12 of 18

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