Cypress CY14B101L manual Pin Shrunk Small Outline Package

Page 16

CY14B101L

Package Diagrams (continued)

Figure 15. 48-Pin Shrunk Small Outline Package (51-85061)

51-85061-*C

Document Number: 001-06400 Rev. *I

Page 16 of 18

[+] Feedback

Image 16
Contents Features Logic Block DiagramFunctional Description Cypress Semiconductor CorporationPinouts Pin DefinitionsDevice Operation Sram ReadSram Write AutoStore OperationHardware Recall Power Up Low Average Active PowerSoftware Store Software RecallPreventing Store Best PracticesHardware Mode Selection A15 A0 Power DC Electrical Characteristics Range Ambient TemperatureMaximum Ratings Operating RangeData Retention and Endurance CapacitanceThermal Resistance AC Test ConditionsAC Switching Characteristics Switching WaveformsMin Max ParameterChip Enable To End of Write Data Setup to End of WriteAddress Setup to End of Write Address Setup to Start of WriteAutoStore or Power Up Recall Parameter Alt Description CY14B101L Unit Min MaxSoftware Controlled STORE/RECALL Cycle Parameter Alt Description 25 ns 35 ns 45 ns Unit Min MaxParameter Alt Description CY14B101L Unit Min Hardware Store CycleHardware Store Pulse Width Part Numbering Nomenclature CY 14 B 101 L SZ 25 X C T Ordering InformationSpeed Ordering Code Package DiagramsPackage Type Operating Range Pin Shrunk Small Outline Package Document History Document Title CY14B101L 1 Mbit 128K x 8 nvSRAMSales, Solutions, and Legal Information USB