Cypress CY62148E manual Maximum Ratings, Electrical Characteristics Over the Operating Range

CY62148E MoBL®

Maximum Ratings

Exceeding maximum ratings may impair the useful life of the device. These user guidelines are not tested.

Storage Temperature	–65°C to + 150°C
Ambient Temperature with
Power Applied	–55°C to + 125°C
Supply Voltage to Ground
Potential	–0.5V to 6.0V (VCCmax + 0.5V)
DC Voltage Applied to Outputs
in High-Z State [5, 6]	–0.5V to 6.0V (V	CCmax	+ 0.5V)

Electrical Characteristics (Over the Operating Range)

DC Input Voltage [5, 6]		–0.5V to 6.0V (V		+ 0.5V)
		CCmax
Output Current into Outputs (LOW)				20 mA
Static Discharge Voltage			> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current			>200mA
Operating Range
Device	Range	Ambient		[7]
		Temperature	VCC
CY62148E	Ind’l/Auto-A	–40°C to +85°C	4.5V to 5.5V

Parameter

Description

Test Conditions

45 ns

55 ns [2]

Unit

Min

Typ [3]

Max

Min

Typ [3]

Max

VOH

Output HIGH

IOH = –1 mA

2.4

2.4

V

Voltage

VOL

Output LOW Voltage

IOL = 2.1 mA

0.4

0.4

V

VIH

Input HIGH Voltage

VCC = 4.5V to 5.5V

2.2

VCC + 0.5

2.2

VCC + 0.5

V

VIL

Input LOW voltage

VCC = 4.5V to 5.5V

For TSOPII

–0.5

0.8

V

package

For SOIC

–0.5

0.6 [8]

package

IIX

Input Leakage

GND < VI < VCC

–1

+1

–1

+1

∝A

Current

IOZ

Output Leakage

GND < VO < VCC, Output Disabled

–1

+1

–1

+1

∝A

Current

ICC

VCC Operating

f = fmax = 1/tRC

VCC = VCC(max)

15

20

15

20

mA

Supply Current

IOUT = 0 mA

f = 1 MHz

2

2.5

2

2.5

CMOS levels

ISB2 [9]

Automatic CE Power

> VCC – 0.2V

1

7

1

7

∝A

CE

down Current —

VIN > VCC – 0.2V or VIN < 0.2V,

CMOS Inputs

f = 0, VCC = VCC(max)

Capacitance (For All Packages) [10]

Parameter	Description	Test Conditions	Max	Unit
CIN	Input Capacitance	TA = 25°C, f = 1 MHz,	10	pF
		VCC = VCC(typ)
COUT	Output Capacitance		10	pF

Notes

5.VIL(min) = –2.0V for pulse durations less than 20 ns for I < 30 mA.

6.VIH(max) = VCC+0.75V for pulse durations less than 20 ns.

7.Full device AC operation assumes a minimum of 100 µs ramp time from 0 to VCC(min) and 200 µs wait time after VCC stabilization.

8.Under DC conditions the device meets a VIL of 0.8V. However, in dynamic conditions Input LOW Voltage applied to the device must not be higher than 0.6V. This is applicable to SOIC package only. Refer to AN13470 for details.

9.Only chip enable (CE) must be HIGH at CMOS level to meet the ISB2 spec. Other inputs can be left floating.

10.Tested initially and after any design or process changes that may affect these parameters.

Document #: 38-05442 Rev. *F Page 3 of 10

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