Cypress CY62148E manual Truth Table, Write Cycle No CE Controlled 19, IO’s Mode Power

Page 7

CY62148E MoBL®

Switching Waveforms (continued)

Write Cycle No. 2 (CE Controlled) [19, 20]

 

tWC

 

ADDRESS

 

 

CE

tSCE

 

 

 

 

tSA

 

 

tAW

tHA

 

tPWE

 

WE

 

 

 

tSD

tHD

DATA IO

DATA VALID

 

 

 

Write Cycle No. 3 (WE Controlled, OE LOW) [20]

 

 

tWC

 

ADDRESS

 

 

 

 

 

tSCE

 

CE

 

 

 

 

tAW

 

tHA

 

tSA

tPWE

 

WE

 

 

 

 

 

tSD

tHD

DATA IO

NOTE 21

DATA VALID

 

 

tHZWE

 

tLZWE

Truth Table

CE

WE

OE

IO’s

Mode

Power

H

X

X

High Z

Deselect/Power down

Standby (ISB)

L

H

L

Data Out

Read

Active (ICC)

L

L

X

Data In

Write

Active (ICC)

L

H

H

High Z

Selected, Outputs Disabled

Active (ICC)

Document #: 38-05442 Rev. *F

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Contents Soic FeaturesProduct Portfolio Functional Description TsopPin Configuration 2 Logic Block DiagramPin SOIC/TSOP II Pinout Top View Maximum Ratings Electrical Characteristics Over the Operating RangeOperating Range Data Retention Waveform Data Retention Characteristics Over the Operating RangeThermal Resistance AC Test Loads and WaveformsRead Cycle Parameter Description 45 ns 55 ns Unit MinWrite Cycle Write Cycle No WE Controlled, OE High During Write 19 Switching WaveformsRead Cycle No Address Transition Controlled 16 Read Cycle No OE Controlled 17Write Cycle No WE Controlled, OE LOW IO’s Mode PowerTruth Table Write Cycle No CE Controlled 19Ordering Information Package DiagramsPin 450 MIL Molded Soic REV ECN no Document HistoryDocument Title CY62148E MoBL , 4-Mbit 512K x 8 Static RAM Document Number