Motorola PRPMC800A/IH5, PrPMC800/800ET Processor PMC Module manual L2 Cache

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3 Functional Description

Processor

The PrPMC800/800ET board can be ordered with one of the following low-power/low care voltage processor chips: 450 MHz MPC750-class, 450MHz or 500MHz MCP7410, or a 400 MHz MPC7410 (N).

L2 Cache

The PrPMC800/800ET utilizes a backside L2 cache structure via the MPC750-class or MPC7410 processor chip families. The L2 cache is implemented with an on-chip, 2-way set- associative tag memory and external direct-mapped synchronous SRAMs for data storage. The external SRAMs are accessed through a dedicated 72-bit wide (64 bits of data and 8 bits of parity) L2 cache port. The MPC750-class processors support up to 1MB of L2 cache SRAMs. The MPC7410 processor can support up to 2MB. The L2 cache can operate in copyback or write-through modes and supports system cache coherency through snooping. Data parity generation and checking can be disabled by programming the processor’s L2 cache control register accordingly. The MPC7410 processor also supports direct mapping of the SRAM memory, in conjunction with normal L2 cache operation. In this mode, a portion of the SRAM memory space may be mapped to appear as a private memory space in the memory map. Refer to the processor data sheet for additional information.

The L2 cache data SRAM for the PrPMC800/800ET is implemented using two 128K x 36 or 256K x 36 synchronous pipelined burst SRAMs providing a total of 1MB or 2MB of L2 cache, depending on the board version.

Harrier System Memory Controller / PCI Host Bridge ASIC

The Harrier ASIC provides the bridge function between the PPC60x bus, the system memory, and the PCI Local Bus. The Harrier ASIC incorporates the following key features:

100 MHz PowerPC-compatible bus interface

SDRAM interface supporting up to eight banks of 512MB each, with ECC

32/64-bit REV2.1 compliant PCI bus interface capable of running up to 66 MHz

Single channel DMA controller

Message passing unit supporting I2O and generic functions

Two internal 16550-type UARTs

Two I2C bus master interfaces

MPIC compliant interrupt controller

Four Xport channels for interfacing to flash or other external registers/devices

Refer to the Harrier Programmer’s Guide for additional information and programming details.

16PrPMC800/800ET Processor PMC Module Installation and Use (PrPMC800A/IH5)

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Contents Installation and Use Page Use Caution When Exposing or Handling a CRT Ground the InstrumentDo Not Operate in an Explosive Atmosphere Keep Away From Live Circuits Inside the EquipmentFlammability Limited and Restricted Rights Legend Page Contents Connector Pin Assignments Modifying the Environment Contents List of Figures List of Figures J2 Harrier Power-Up Configuration Header Pin Assignments List of TablesList of Tables PrPMC800/800ET Models/Configurations About This Manual1MB 2MBAbout This Manual PRPMC800A/IH5 PRPMC800A/IH4PRPMC800A/IH3 PRPMC800A/IH2Overview of Contents Conventions Used in This Manual About This Manual Preparation and Installation IntroductionPrPMC800/800ET Description Monarch and Non-Monarch PrPMCs Carrier Board RequirementsSystem Enclosure Overview of Start-Up Procedures Start-Up OverviewWhat you need to do Refer to PrPMC800/800ET Configuration Unpacking the HardwarePreparing the Hardware Harrier Power-Up Configuration Header J2 Harrier Power-Up Configuration Header Pin AssignmentsJumper On Jumper Off PrPMC800/800ET Headers, Connectors and Components Installation ESD PrecautionsInstallation of PrPMC800/800ET on a VME or CompactPCI Board Installing a PrPMC800/800ET on a VMEmodule Applying Power Operating InstructionsStatus Indicators Operating InstructionsDebug Serial Port Ethernet Port Adapter CablePrPMC800/800ET Debug Page Features PrPMC800/800ET FeaturesFeature Description Functional DescriptionGeneral Description SromBlock Diagram PrPMC800/800ET Block DiagramProcessor L2 CacheHarrier System Memory Controller / PCI Host Bridge Asic Harrier Power-Up Configuration Harrier Power-Up Configuration SettingsHarrier Select Default Function Description Option Power Register Bit Bus Signal SettingXCSR.GCSR.PUST XADM66EN XCSR.XPAT0.DWArbitration Flash MemoryXCSR.XPAT1.DW XCSR.XPAT2.DWECC Memory Onboard Bank a FlashOptional Bank B Flash Onboard SdramTimers Bit Timers10BaseT/100BaseTX Ethernet Channel Miscellaneous Control and StatusWatchdog Timers Interrupt Routing and GenerationAsynchronous Serial Port Clock GeneratorPrPMC800/800ET Power Supplies Module Reset LogicReset Source Functions Reset Source Type Module Reset PrPMC Resetoutl ActivePrPMC800/800ET Reset Block Diagram PCI InterfacePRESENT# Signal MONARCH# SignalINTA#-INTD# Signals IDSELB, REQB#, and GNTB# SignalsEready Signal PCI Signaling Voltage LevelABORT# and RESET# Signals Debug HeaderMemory Maps Page Connector Pin Assignments PCI Mezzanine Card PMC ConnectorsPMC Connector P11 Pin Assignments SDONE# SBO# PAR GND VIO GND VIOPMC Connector P12 Pin Assignments PMC Connector P13 Pin Assignments PAR64PMC Connector P14 Pin Assignments P14Signal Description for P14 Ethernet Adapter Connector J3 Ethernet Adapter Connector Pin AssignmentsJ1 Debug Header Pin Assignments TXP TXN RXP RXN Lanterma LantermbSignal Description for J1 RsvdShunt On Shunt Off Cputrstl Pullup Cputck Cputms Sresetl Cpurstl Ckstpol GND Debug Serial Port CablePrPMC Cable-001 Termination PPCBug OverviewPPCBug Basics Memory Requirements PPCBug ImplementationMPU, Hardware, and Firmware Initialization Using PPCBug Debugger Commands Debugger CommandsCommand Description Gevinit GevshowIdle IOCPboot ResetNping NopaDiagnostic Tests Diagnostic Test GroupsTest Group Description Isabrdge L2CACHEMask MpicPage Cnfg Configure Board Information Block Modifying the EnvironmentConfiguring the PPCBug Parameters ENV Set EnvironmentSelect the identifier. Default = Default = $00 Auto Boot Abort Delay = 7? Default Starting Address is $00000000 ROM First Access Length 0 31 = 10? Serial Startup Code Master Enable Y/N=N? Specifications SpecificationsMechanical Characteristics Electrical CharacteristicsEnvironmental Characteristics Characteristics SpecificationsEMC Compliance Thermal Validation Thermally Significant ComponentsTable B-1. Thermally Significant Components Thermal ValidationFigure B-1. Thermally Significant Components Primary Side Component Temperature Measurement PreparationMeasuring Junction Temperature Measuring Case TemperatureMeasuring Local Air Temperature Figure B-4. Mounting a Thermocouple Under a Heatsink Related Documentation Embedded Communications Computing DocumentsTable C-1. Embedded Communications Computing Documents Manufacturers’ Documents Table C-2. Manufacturers’ DocumentsRelated Specifications Table C-3. Related SpecificationsDocument Title and Source Publication Number Page Index CPUIndex Fail LEDIDSELB, REQB#, GNTB# 25 INTA#-INTD# Xix

PRPMC800A/IH5, PrPMC800/800ET Processor PMC Module specifications

The Motorola PrPMC800/800ET Processor PMC Module, specifically the PRPMC800A/IH5 variant, represents a significant advancement in embedded processing technology. Often utilized in telecommunications, aerospace, and defense applications, this PMC module is designed to provide robust performance in demanding environments, making it suitable for high-speed data processing and communication tasks.

At the core of the PrPMC800 module is the PowerPC 750 architecture, known for its efficiency and power management capabilities. This 32-bit RISC processor is clocked at speeds reaching up to 800 MHz, allowing it to handle complex computations and multitasking scenarios effectively. The processor architecture supports a variety of software environments, including real-time operating systems and VxWorks, which enhances its adaptability across diverse applications.

One of the standout features of the PRPMC800A/IH5 module is its memory capacity. The module supports up to 1 GB of SDRAM, offering ample space for processing large datasets and executing multiple applications simultaneously. Furthermore, the integrated PCI bus facilitates high-speed connectivity with other modules and components in the system, ensuring rapid data transfer rates essential for real-time processing tasks.

An important characteristic of the PrPMC800 module is its thermal and environmental resilience. Designed with military-grade standards, it operates reliably in extreme conditions, including high temperatures and vibrations. This makes it particularly suitable for rugged applications where standard commercial-grade processors may fail.

The module also incorporates advanced I/O capabilities, featuring dual Gigabit Ethernet ports which enhance networking performance. Additional serial ports and interrupt handling further improve the module's versatility, allowing it to interface seamlessly with various peripheral devices and systems.

In summary, the Motorola PrPMC800/800ET Processor PMC Module, represented by the PRPMC800A/IH5 model, is an exemplary solution for applications requiring high performance, reliability, and adaptability. With its powerful PowerPC architecture, generous memory capacity, robust I/O capabilities, and proven ruggedness, this processor module stands out as a preferred choice for engineers and developers working in critical industries.