3 Functional Description
Table 3-2. Harrier Power-Up Configuration Settings (continued)
Harrier | Select | Default | Function/ | Description |
XAD | Option | Power- | Register Bit |
|
Bus |
| Up |
|
|
Signal |
| Setting |
|
|
|
|
|
|
|
XAD[23] | Jumper J2 | 1 | Generic power up | Software readable header bit |
| pins |
| status bit 3 | 3 |
|
|
| XCSR.GCSR.PUST |
|
|
|
| 3 |
|
|
|
|
|
|
XAD[22] | Jumper J2 | 1 | Generic power up | Software readable header bit |
| pins |
| status bit 2 | 2 |
|
|
| XCSR.GCSR.PUST |
|
|
|
| 2 |
|
|
|
|
|
|
XAD[21] | Jumper J2 | 1 | Generic power up | Software readable header bit |
| pins |
| status bit 1 | 1 |
|
|
| XCSR.GCSR.PUST |
|
|
|
| 1 |
|
|
|
|
|
|
XAD[20] | Jumper J2 | 1 | Generic power up | Software readable header bit |
| pins |
| status bit 0 | 0 |
|
|
| XCSR.GCSR.PUST |
|
|
|
| 0 |
|
|
|
|
|
|
XAD[19] | Jumper J2 | 0 | I2O IOP agent | Set PCI Configuration register |
| pins |
|
| CLAS to present class code |
|
|
|
| for “bridge device” (0) or “I2O |
|
|
|
| Controller” (1) |
|
|
|
|
|
XAD[18] | Fixed | 0 | Internal PCI arbiter | Disable internal PCI arbiter |
|
|
|
|
|
XAD[17] | Fixed | 1 | Internal processor | Enable internal Processor |
|
|
| arbiter | arbiter |
|
|
|
|
|
XAD | Fixed | 00 | XCSR register group | Set XCSR register group |
[16:15] |
|
| base address | base address to $FEFF0000 |
|
|
|
|
|
|
| 000 | reserved |
|
|
|
|
|
|
| On board | 001 | 3:2 | Set |
|
|
| 3:2 | |
| logic sets |
|
| |
|
|
|
| |
| 010 | 2:1 | Set | |
| ratio | |||
| depending |
|
| 2:1 |
| on state of |
|
|
|
| 011 | 5:2 | Set | |
| M66EN | |||
XAD |
|
| 5:2 | |
|
|
| ||
|
|
|
| |
| 100 | 1:1 | Set | |
|
| |||
|
|
|
| 1:1 |
|
|
|
|
|
|
| 101 | reserved |
|
|
|
|
|
|
|
| 110 | 3:1 | Set |
|
|
|
| 3:1 |
|
|
|
|
|
|
| 111 | reserved |
|
|
|
|
|
|
XAD | Fixed | 01 | Xport channel 0 data | Set flash bank A to |
[11:10] |
|
| width | width |
|
|
| XCSR.XPAT0.DW |
|
|
|
|
|
|
18PrPMC800/800ET Processor PMC Module Installation and Use (PrPMC800A/IH5)