National Instruments HPC167064, HPC467064 manual Block Diagram of Interrupt Logic

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FIGURE 18. Block Diagram of Interrupt Logic

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Contents General Description FeaturesALL Other Inputs DC Electrical CharacteristicsReset Absolute Maximum RatingsUPI 20 MHz AC Electrical CharacteristicsDelay from CK2 Falling Edge to ALE Falling Edge Delay from CKI Rising Edge to ALE Rising EdgeDelay from CKI Rising Edge to ALE Falling Edge Delay from CK2 Rising Edge to ALE Rising Edge30 MHz AC Electrical Characteristics CKI Input Signal Characteristics Input and Output for AC Tests CK1, CK2, ALE Timing DiagramRead Cycle Microwire Setup/Hold Timing Econa Eprom ModeNormal Running Mode Functional Modes of OperationMemory Map of the HPC167064 Erasure CharacteristicsPin Descriptions Ports a & B Connection DiagramPorts a & B Operating Modes HPC167064 Interrupts Power Save ModesHPC167064 Operating Modes Wait StatesBit External Memory Interrupt Control Registers Timer OverviewInterrupt Arbitration Interrupt ProcessingBlock Diagram of Interrupt Logic Synchronous Outputs Timers T2 T3 BlockWatchdog Logic Timer RegistersTimer Applications MICROWIRE/PLUS OperationMICROWIRE/PLUS Application MICROWIRE/PLUSHPC167064 Uart Uart Wake-Up ModeShared Memory Support Universal Peripheral InterfaceMemory Design Considerations Dfffdffe Table IV. Memory Map of HPC167064 Emulating an HPC16083Frequency MHz 1500 1200 910 750 600 470 390 300 220 180 100 XtalAddressing Modes HPC167064 CPUHPC Instruction Set Description Memory Transfer Instructions BIT Instructions SbitRbit IfbitDevelopment Support Code EfficiencyHPC-DEV-IBMC HOW to OrderProgramming Support HPC-DEV-IBMAYamaichi Part SelectionSocket Selection PlccPage Life Support Policy Physical Dimensions inches millimeters