National Instruments
HPC467064, HPC167064
manual
Read Cycle
DC Electrical Characteristics
CK1, CK2, ALE Timing Diagram
Timer Overview
Microwire Setup/Hold Timing
How to
Power Save Modes
Features
Eprom Mode
Page 8
Timing Waveforms
(Continued)
TL/DD/11046 – 7
FIGURE 5. Read Cycle
TL/DD/11046 – 8
FIGURE 6. Ready Mode Timing
TL/DD/11046 – 9
FIGURE 7. Hold Mode Timing
8
Page 7
Page 9
Image 8
Page 7
Page 9
Contents
Features
General Description
DC Electrical Characteristics
Reset
Absolute Maximum Ratings
ALL Other Inputs
20 MHz AC Electrical Characteristics
UPI
Delay from CKI Rising Edge to ALE Rising Edge
Delay from CKI Rising Edge to ALE Falling Edge
Delay from CK2 Rising Edge to ALE Rising Edge
Delay from CK2 Falling Edge to ALE Falling Edge
30 MHz AC Electrical Characteristics
CKI Input Signal Characteristics
CK1, CK2, ALE Timing Diagram
Input and Output for AC Tests
Read Cycle
Microwire Setup/Hold Timing
Eprom Mode
Normal Running Mode
Functional Modes of Operation
Econa
Erasure Characteristics
Memory Map of the HPC167064
Pin Descriptions
Connection Diagram
Ports a & B
Ports a & B
Operating Modes
Power Save Modes
HPC167064 Operating Modes
Wait States
HPC167064 Interrupts
Bit External Memory
Timer Overview
Interrupt Arbitration
Interrupt Processing
Interrupt Control Registers
Block Diagram of Interrupt Logic
Timers T2 T3 Block
Synchronous Outputs
Timer Registers
Timer Applications
MICROWIRE/PLUS Operation
Watchdog Logic
MICROWIRE/PLUS
MICROWIRE/PLUS Application
Uart Wake-Up Mode
HPC167064 Uart
Memory
Universal Peripheral Interface
Shared Memory Support
Design Considerations
Table IV. Memory Map of HPC167064 Emulating an HPC16083
Dfffdffe
Xtal
Frequency MHz 1500 1200 910 750 600 470 390 300 220 180 100
HPC Instruction Set Description
HPC167064 CPU
Addressing Modes
BIT Instructions Sbit
Rbit
Ifbit
Memory Transfer Instructions
Code Efficiency
Development Support
HOW to Order
Programming Support
HPC-DEV-IBMA
HPC-DEV-IBMC
Part Selection
Socket Selection
Plcc
Yamaichi
Page
Physical Dimensions inches millimeters
Life Support Policy
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