National Instruments HPC167064, HPC467064 manual Operating Modes

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Ports A & B (Continued)

TL/DD/11046 – 22

FIGURE 14. Structure of Port B Pins B10, B11, B12 and B15 (Pins with Bus Control Roles)

Operating Modes

To offer the user a variety of I/O and expanded memory options, the HPC167064 has four operating modes. The various modes of operation are determined by the state of both the EXM pin and the EA bit in the PSW register. The state of the EXM pin determines whether on-chip EPROM will be accessed or external memory will be accessed within the address range of the on-chip EPROM. The on-chip EPROM range of the HPC167064 is C000 to FFFF (16 kbytes).

A logic ‘‘0’’ state on the EXM pin will cause the HPC device to address on-chip EPROM when the Program Counter (PC) contains addresses within the on-chip EPROM address range. A logic ‘‘1’’ state on the EXM pin will cause the HPC device to address memory that is external to the HPC when the PC contains on-chip EPROM addresses. The function of the EA bit is to determine the legal addressing range of the HPC device. A logic ‘‘0’’ state in the EA bit of the PSW register does two things—addresses are limited to the on- chip EPROM range and on-chip RAM and Register range, and the ‘‘illegal address detection’’ feature of the WATCH-

DOG logic is engaged. A logic ‘‘1’’ in the EA bit enables accesses to be made anywhere within the 64 kbytes ad- dress range and the ‘‘illegal address detection’’ feature of the WATCHDOG logic is disabled.

All HPC devices can be used with external memory. Exter- nal memory may be any combination of RAM and EPROM. Both 8-bit and 16-bit external data bus modes are available. Upon entering an operating mode in which external memory is used, Port A becomes the Address/Data bus. Four pins of Port B become the control lines ALE, RD, WR and HBE. The High Byte Enable pin (HBE) is used in 16-bit mode to select high order memory bytes. The RD and WR signals are only generated if the selected address is off-chip. The 8- bit mode is selected by pulling HBE high at reset. If HBE is left floating or connected to a memory device chip select at reset, the 16-bit mode is entered. The following sections describe the operating modes of the HPC167064.

Note: The HPC devices use 16-bit words for stack memory. Therefore, when using the 8-bit mode, User’s Stack must be in internal RAM.

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Contents General Description FeaturesALL Other Inputs DC Electrical CharacteristicsReset Absolute Maximum RatingsUPI 20 MHz AC Electrical CharacteristicsDelay from CK2 Falling Edge to ALE Falling Edge Delay from CKI Rising Edge to ALE Rising EdgeDelay from CKI Rising Edge to ALE Falling Edge Delay from CK2 Rising Edge to ALE Rising Edge30 MHz AC Electrical Characteristics CKI Input Signal Characteristics Input and Output for AC Tests CK1, CK2, ALE Timing DiagramRead Cycle Microwire Setup/Hold Timing Econa Eprom ModeNormal Running Mode Functional Modes of OperationMemory Map of the HPC167064 Erasure CharacteristicsPin Descriptions Ports a & B Connection DiagramPorts a & B Operating Modes HPC167064 Interrupts Power Save ModesHPC167064 Operating Modes Wait StatesBit External Memory Interrupt Control Registers Timer OverviewInterrupt Arbitration Interrupt ProcessingBlock Diagram of Interrupt Logic Synchronous Outputs Timers T2 T3 BlockWatchdog Logic Timer RegistersTimer Applications MICROWIRE/PLUS OperationMICROWIRE/PLUS Application MICROWIRE/PLUSHPC167064 Uart Uart Wake-Up ModeUniversal Peripheral Interface Shared Memory SupportMemory Design Considerations Dfffdffe Table IV. Memory Map of HPC167064 Emulating an HPC16083Frequency MHz 1500 1200 910 750 600 470 390 300 220 180 100 XtalHPC167064 CPU Addressing ModesHPC Instruction Set Description Memory Transfer Instructions BIT Instructions SbitRbit IfbitDevelopment Support Code EfficiencyHPC-DEV-IBMC HOW to OrderProgramming Support HPC-DEV-IBMAYamaichi Part SelectionSocket Selection PlccPage Life Support Policy Physical Dimensions inches millimeters
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