CyClone COMPACTPCI-824 user manual Breeze Start-up Leds, LED Tests, Geographic Addressing

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HARDWARE

 

Table 2-6. Breeze Start-up LEDS

 

 

LED

TESTS

 

 

ACT

TLBs set. External bus controller set

 

 

ST0

PCB arbitration priorities set

 

 

ST1

Interrupt controller set

 

 

IOP

UART set

 

 

ACT, ST0

System reset check done.

 

 

ACT, ST1

I2C bus set. (first pass)

 

 

ACT, IOP

Board configuration initialized

 

 

ST0, ST1

Board strapping validated

 

 

ST0, IOP

I2C bus set. (second pass)

 

 

ST1, IP

SDRAM initialized

 

 

ACT, ST0, ST1

SDRAM checked and cleared.

 

 

None

Breeze entry

 

 

2.8.4Geographic Addressing

CompactPCI backplanes that support 64-bit connector pin assignments are required to provide a unique differentiation based upon which physical slot the board has been inserted. The CPCI-824 makes this definition available to the software. The definition for GA[4:0] is shown in Figure 2.3.

Figure 2-3. Geographic Addressing Register, E800 0001h

GA0

GA1

GA2

GA3

GA4

READ Only

(1)+5V

(0)GND

7

6

5

4

3

2

1

0

2-8

CPCI-824 User’s Manual

 

Revision 1.0, January 2006

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Contents Page Appendix a ContentsChapter Appendix BList of Figures List of TablesContents CPCI-824 Block Diagram IntroductionGeneral Introduction Features SdramGeneral Introduction Specifications Environmental SpecificationsEnvironmental CPCI-824 Physical Configuration General IntroductionReference Manuals Applied Micro Circuits CorporationSoftware Development Amcc Powerpc 440GX Processor HardwareByte Ordering Hardware Memory MAP DDR Sdram InterfaceDDR DDR Sdram SdramInterrupts Input External InterruptsInterrupt Console Serial PortConsole Serial Port Connector Pin Signal Description EthernetGigabit Ethernet Port Fast Ethernet Port 100 Fast Port Connector Pin Signal Description 10/100Base-TGigabit Ethernet Port LEDs Fast Ethernet Port LEDsLeds Hardware Peripheral BUSFlash ROM User LEDs During InitializationBreeze Start-up Leds LED TestsGeographic Addressing Power Supply Monitoring FAN Monitoring10 I2C BUS Sdram Eeprom Jtag Emulator SupportJtag Emulator Pin Assignment Signal PMC Module Signal Definitions Physical AttributesModule Idsel Addr IDSEL# Clock Arbitration PMC Module ConnectorPMC Module Interface ST Device ND DeviceTable A-3. P21 PMC Module Connector Pinout Table A-4. P22 PMC Module Connector Pinout Signal Table A-5. P23 PMC Module Connector Pinout Appendix B Cpci J2 Definition Table B-1 CPCI-824 J2 Definition