Introduction, CPCI-824 Block Diagram | CyClone COMPACTPCI-824

CHAPTER 1 GENERAL INTRODUCTION

1.1INTRODUCTION

The CompactPCI-824 is a Hot Swap Intelligent I/O Controller.

The CPCI-824 card is based on the AMCC™ PowerPC™ 440GX, which is AMCC’s next generation integrated processor based on the PowerPCI 440 core operating at a frequency of 667 MHz. The 440GX supplies memory controller functions with up to 512 Mbytes of DDR SDRAM (64-bit with ECC) on an SoDIMM module at 333 MHz DDR. The PowerPC core with 256K L2 cache, the memory controller, the PCI-X Bridge, and the DMA controller of AMCC 440GX are among the features on the Processor local bus operating at 128-bit and a frequency of 166 MHz. The 440GX Peripheral Bus (EPC) has three devices; 8 Mbytes of Flash ROM, software LEDs, and external revision control registers. Additionally, the 440GX contains four Ethernet MACs. Four Ethernet ports are provided on the CPCI-824. Two are 10/100/1Gb ports configured as RGMII and two are 10/100 Mbps ports and reconfigured as SMII. The CPCI-824 also utilized one of the I2C bus interface units, and one of the two UART units. A block diagram of the CPCI-824 is shown on Figure 1-1.

	Figure 1-1. CPCI-824 Block Diagram
10/100/1000	10/100/1000	10/100	10/100
10/100/1000	10/100/1000	Ethernet	10/100
Ethernet Port	Ethernet Port	Ethernet	Ethernet Port
Ethernet Port	Ethernet Port	Port	Ethernet Port
		Port
PHY	PHY		PHY
DDR SDRAM
333 MHz		Console
		Console
Flash		Serial
Flash	AMCC PPC440GX	Port
ROM	MHz
	MHz
JTAG
I/F
	Local Bus PCI-X

CPCI-824 User’s Manual	1-1
Revision 1.0, January 2006

CHAPTER 1

GENERAL INTRODUCTION

1.1INTRODUCTION

Figure 1-1. CPCI-824 Block Diagram