CyClone COMPACTPCI-824 user manual Software Development

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GENERAL INTRODUCTION

JTAG Debugger

Wind River HSI

500 Wind River Way

Alameda, CA 94501

(510)748-4100 http://www.windriver.com

1.6SOFTWARE DEVELOPMENT

To simplify software development, Cyclone Microsystems has created the Breeze Development EnvironmentTM. Breeze includes initialization routines, hardware control routines and functions which

provide a simple interface to the PCI bus. Source code for accessing the Breeze Development Environ- mentTM is included with the CPCI-824, allowing Breeze functions to be incorporated in a real-time operating system as well.

The Breeze Development EnvironmentTM has been designed to make the development cycle on the CPIC-713 as simple as possible. Source code provided for Breeze also acts as example code to aid developers in creatnig their own applications. Breeze is present on all CPCI-824 systems and its debugging facilities are available during the development cycle.

Breeze for the CPCI-824 has been developed with the aid of the Wind River HSI VisionPROBE software debugger and VisionCLICK user interface. The VisionPROBE degugger communicates with a JTAG port on the CPCI-824. It provides the capability to download user code to Flash ROM or SDRAM. It is recommended that developers obtain a set of these tools or their equivalents to support application code development.

A complete description of the Breeze Development EnvironmentTM can be found in the “Breeze for PowerPC 440GX Developer’s Manual”, see Section 1.5, Reference Manuals.

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CPCI-824 User’s Manual

 

Revision 1.0, January 2006

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Contents Page Appendix a ContentsChapter Appendix BList of Figures List of TablesContents CPCI-824 Block Diagram IntroductionGeneral Introduction Features Sdram Environmental Specifications General Introduction Specifications Environmental CPCI-824 Physical Configuration General IntroductionReference Manuals Applied Micro Circuits CorporationSoftware Development Hardware Amcc Powerpc 440GX ProcessorByte Ordering Hardware Memory MAP DDR Sdram InterfaceSdram DDR DDR SdramInterrupts Input External InterruptsInterrupt Console Serial PortEthernet Console Serial Port Connector Pin Signal DescriptionGigabit Ethernet Port Fast Ethernet Port 100 Fast Port Connector Pin Signal Description 10/100Base-TGigabit Ethernet Port LEDs Fast Ethernet Port LEDsLeds Hardware Peripheral BUSFlash ROM User LEDs During InitializationLED Tests Breeze Start-up LedsGeographic Addressing FAN Monitoring Power Supply Monitoring10 I2C BUS Sdram Eeprom Jtag Emulator SupportJtag Emulator Pin Assignment Signal PMC Module Signal Definitions Physical AttributesModule Idsel Addr IDSEL# Clock Arbitration PMC Module ConnectorPMC Module Interface ST Device ND DeviceTable A-3. P21 PMC Module Connector Pinout Table A-4. P22 PMC Module Connector Pinout Signal Table A-5. P23 PMC Module Connector Pinout Appendix B Cpci J2 Definition Table B-1 CPCI-824 J2 Definition
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