CyClone COMPACTPCI-824 user manual

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COMPACTPCI-824

FEP BLADE INTELLIGENT

I/O CONTROLLER

USER’S MANUAL

The information in this document has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore, Cyclone Microsystems, Inc. reserves the right to make changes to any products herein to improve reliability, function, or design. Cyclone Microsystems, Inc. neither assumes any liability arising out of the application or use of any product or circuit described herein, nor does it convey any license under its right or the rights of others.

Revision 1.0, January 2006

Cyclone P/N 800-0824

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Contents Page Chapter ContentsAppendix a Appendix BList of Tables List of FiguresContents Introduction CPCI-824 Block DiagramSdram General Introduction FeaturesEnvironmental Specifications General Introduction SpecificationsEnvironmental General Introduction CPCI-824 Physical ConfigurationApplied Micro Circuits Corporation Reference ManualsSoftware Development Hardware Amcc Powerpc 440GX ProcessorByte Ordering DDR Sdram Interface Hardware Memory MAPSdram DDR DDR SdramInterrupts Interrupt External InterruptsInput Console Serial PortEthernet Console Serial Port Connector Pin Signal DescriptionGigabit Ethernet Port Gigabit Ethernet Port LEDs 100 Fast Port Connector Pin Signal Description 10/100Base-TFast Ethernet Port Fast Ethernet Port LEDsFlash ROM Hardware Peripheral BUSLeds User LEDs During InitializationLED Tests Breeze Start-up LedsGeographic Addressing FAN Monitoring Power Supply Monitoring10 I2C BUS Jtag Emulator Support Sdram EepromJtag Emulator Pin Assignment Signal Physical Attributes PMC Module Signal DefinitionsPMC Module Interface PMC Module ConnectorModule Idsel Addr IDSEL# Clock Arbitration ST Device ND DeviceTable A-3. P21 PMC Module Connector Pinout Table A-4. P22 PMC Module Connector Pinout Signal Table A-5. P23 PMC Module Connector Pinout Table B-1 CPCI-824 J2 Definition Appendix B Cpci J2 Definition