Maxtor 6800 manual Pin Description Table, PIN Name Signal Name Signal Description

Page 33

AT INTERFACE DESCRIPTION

Pin Description Table

PIN NAME

PIN

I/O

SIGNAL NAME

SIGNAL DESCRIPTION

 

 

 

 

 

RESET -

01

I

Host Reset

Reset signal from the host system. Active during power up and inactive after.

 

 

 

 

 

DD0

17

I/O

Host Data Bus

16 bit bi-directional data bus between host and drive. Lower 8 bits used for register

 

 

 

 

and ECC byte transfers. All 16 bits used for data transfers.

DD1

15

I/O

 

 

 

 

 

 

 

DD2

13

I/O

 

 

 

 

 

 

 

DD3

11

I/O

 

 

 

 

 

 

 

DD4

09

I/O

 

 

 

 

 

 

 

DD5

07

I/O

 

 

 

 

 

 

 

DD6

05

I/O

 

 

 

 

 

 

 

DD7

03

I/O

 

 

 

 

 

 

 

DD8

04

I/O

 

 

 

 

 

 

 

DD9

06

I/O

 

 

DD10

08

I/O

 

 

 

 

 

 

 

DD11

10

I/O

 

 

 

 

 

 

 

DD12

12

I/O

 

 

 

 

 

 

 

DD13

14

I/O

 

 

 

 

 

 

 

DD14

16

I/O

 

 

 

 

 

 

 

DD15

18

I/O

 

 

 

 

 

 

 

DMARQ

21

O

DMA Request

This signal is used with DMACK for DMA transfers. By asserting this signal, the

 

 

 

 

drive indicates that data is ready to be transfered to and from the host.

DIOW -

23

I

Host I/O Write

Rising edge of Write strobe clocks data from the host data bus to a register on the

STOP

 

 

 

drive.

DIOR -

25

I

Host I/O Read

Read strobe enables data from a register on the drive onto the host data bus.

HDMARDY

 

 

 

DMA ready during UltraDMA data in bursts.

HSTROBE

 

 

 

Data strobe during UltraDMA data out bursts.

 

 

 

 

 

 

 

 

 

IORDY

27

O

I/O Channel Ready

This signal may be driven low by the drive to insert wait states into host I/O cycles.

DDMARDY

 

 

 

DMA ready during UltraDMA data out bursts.

-

 

 

 

Data strobe during UltraDMA data in bursts.

DSTROBE

 

 

 

 

CSEL

28

 

Cable Select

Used for Master/Slave selection via cable. Requires special cabling on host system

 

 

 

 

and installation of Cable Select jumper.

DMACK -

29

I

DMA Acknowledge

This signal is used with DMARQ for DMA transfers. By asserting this signal, the

 

 

 

 

host is acknowledging the receipt of data or is indicating that data is available.

INTRQ

31

O

Host Interrupt

Interrupt to the host asserted when the drive requires attention from the host.

 

 

 

Request

 

IOCS16

32

 

Device 16 bit I/O

Obsolete

 

 

 

 

 

PDIAG -

34

I/O

Passed Diagnostic

Output by drive when in Slave mode; Input to drive when in Master mode.

 

 

 

 

 

DA0

35

I

Host Address Bus

3 bit binary address from the host to select a register in the drive.

 

 

 

 

 

DA1

33

I

 

 

 

 

 

 

 

DA2

36

I

 

 

 

 

 

 

 

CS0 -

37

I

Host Chip Select 0

Chip select from the host used to access the Command Block registers in the drive.

 

 

 

 

This signal is a decode of I/O addresses 1F0 - 1F7 hex.

CS1 -

38

I

Host Chip Select 1

Chip select from the host used to access the Control registers in the drive. This

 

 

 

 

signal is a decode of I/O addresses 3F6 - 3F7 hex.

DASP -

39

I/O

Drive Active/Drive 1

Time-multiplexed, open collector output which indicates that a drive is active, or that

 

 

 

Present

device 1 is present.

GND

02

N/A

Ground

Signal ground.

 

 

 

 

 

 

19

 

 

 

 

 

 

 

 

 

22

 

 

 

 

 

 

 

 

 

24

 

 

 

 

 

 

 

 

 

26

 

 

 

 

 

 

 

 

 

30

 

 

 

 

 

 

 

 

 

40

 

 

 

 

 

 

 

 

KEY

20

N/A

Key

Pin used for keying the interface connector.

 

 

 

 

 

5 – 2

Page 32 Page 34
Image 33
Page 32 Page 34
Contents HA RD Drive Produc T MA Nual DiamondMax U T I O N Before You BeginContents Handling and Installation Product SpecificationsHost Software Interface AT Interface DescriptionInterface Commands Service and SupportGlossary Figures Maxtor Corporation IntroductionManual Organization AbbreviationsConventions Signal ConventionsKey Words NumberingProduct Description DiamondMax 6800 Key FeaturesFunctional / Interface Product FeaturesLogical Block Addressing On-the-Fly Hardware Error Correction Code ECCDefect Management Zone DMZ Software ECC CorrectionCache Management Read-Ahead ModeBuffer Segmentation Automatic Write Reallocation AWRMajor HDA Components Jumper Location/Configuration Subsystem ConfigurationCylinder Limitation Dual Drive SupportDrive Configuration Product SpecificationsPerformance Specifications Models and CapacitiesParameter Standard Metric Physical DimensionsPower Mode Definitions Power RequirementsEPA Energy Star Compliance Environmental LimitsShock and Vibration Reliability SpecificationsSafety Regulatory Compliance Radiated Electromagnetic Field Emissions EMC ComplianceCanadian Emissions Statement Hard Drive Handling Precautions Handling and InstallationPre-formatted Drive Important NoticeMulti-pack Shipping Container Unpacking and InspectionPhysical Installation Recommended Mounting ConfigurationRepacking Tools for Installation Handling PrecautionsSystem Requirements Drive Identification InformationHard Drive Identification General RequirementsInstalling 5.25-inch Mounting Brackets and Rails Systems Using Cable SelectInstalling in a Device Bay Mounting Drive in SystemAttaching System Cables Attaching Interface and Power CablesSystem Setup Setting the Bios CmosBios Cmos Parameters Hard Drive Preparation System Hangs During Boot Interface Connector AT Interface DescriptionPin Description Summary Pin Description Table PIN Name Signal Name Signal DescriptionPIO Timing Timing Parameters ModeDMA Timing Ultra DMA Timing Mode MIN MAXSustained Ultra DMA Data In Burst Device Terminating an Ultra DMA Data In Burst Initiating an Ultra DMA Data Out Burst Device Pausing an Ultra DMA Data Out Burst Device Terminating an Ultra DMA Data Out Burst Features Register Error RegisterHost Software Interface Task File RegistersSector Number Register Sector Count RegisterCylinder Number Registers Device/Head RegisterCommand Register Summary Command Name Command Code Parameters Used SDHAlternate Status Register Control Diagnostic RegistersDevice Control Register Digital Input RegisterReset and Interrupt Handling Reset HandlingInterrupt Handling Set Feature Commands Interface CommandsRead Commands Read SectorsRead Verify Sectors Read Multiple Read DMASet Multiple Mode Write CommandsWrite Sectors Write Verify SectorsWrite DMA Write MultipleSet Features Mode Set Feature CommandsPower Mode Commands Sleep Mode Identify Drive Initialization Commands15-8 = PIO data transfer mode = Write Cache enabled Initialize Drive Parameters Seek, Format and Diagnostic Commands Execute Drive DiagnosticFormat Track Execute S.M.A.R.T A.R.T. Command SetService Policy Service and SupportNo Quibble Service SupportMaxFax Service Customer ServiceInternet Glossary Access TimeCylinder Zero Gigabyte GB Logical Block Addressing Read Gate Signal THIN-FILM Media
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