Vizio GV42L HDTV, L42HDTV10A service manual RGB Signal

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RGB Signal:

a. Sync Type TTL (Separate / Composite) or Sync. On Green b. Sync polarity Positive or Negative

c. Video Amplitude RGB: 0.7Vp-p

d. Frequency H: support to 30K~70KHz V: support to 50~85Hz

Pixel Clock: support to 110MHz

HDMI Signal (HDMI):

a. Pin Assignment Refer to HDNI Pin Assignment b. Type A

c. Polarity Positive or Negative d. Frequency

H:15.734KHz V: 60Hz (NTSC-480i)

H:31KHz V: 60Hz (NTSC-480p)

H:45KHz V: 60Hz (NTSC-720p)

H:33KHz V: 60Hz (NTSC-1080i)

Component signal (Component 1 and Component 2) Component 1

a. Frequency H: 15.734KHz V: 60Hz (NTSC-480i)

H:31KHz V: 60Hz (NTSC-480p)

H:45KHz V: 60Hz (NTSC-720p)

H:33KHz V: 60Hz (NTSC-1080i)

b.Signal level Y: 1Vp-p Pb: ±0.350Vp-p Pr: ±0.350Vp-p

c.Impedance 75Ω

Component 2

a. Frequency H: 15.734KHz V: 60Hz (NTSC-480i)

H:31KHz V: 60Hz (NTSC-480p)

H:45KHz V: 60Hz (NTSC-720p)

H:33KHz V: 60Hz (NTSC-1080i)

b.Signal level Y: 1Vp-p Pb: ±0.350Vp-p Pr: ±0.350Vp-p

c. Impedance 75Ω

CONFIDENTIAL – DO NOT COPY

Page 5-4

File No. SG-0198

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Contents Vizio GV42L Hdtv Table of Contents Vinc Features Specification Optical CharacteristicsPower Supply Mounting Precautions Dimensions Physical dimension Width 1066 mmWeight Physical weight SpeakerOperating Precautions Handling Precautions for Protection On Screen Display TV SourceRGB Mode AV Component Mode Hdmi MODE: Confidential do not Copy Factory preset timings Pin Assignment Hdmi Connect PIN Assignment Type TV RF connector RGB Signal Main Board I/o Connections Theory of Circuit Operation MT8202 Application YPbPr/Scart/D-connector Video inputDecoder Digital port Support FormatsSupporting OSD mirror and upside down 2D-Graphic/OSD processorI/O ports are configured as follows: Microprocessor interfaceVideo processor 1.Color Management Dram Usage DDR Sdram V58C2128164SBI5 Application Pin description Command Truth Table Power-UpFunctional DescriptionMode Register Set MRS Precharge Bank Activate Command Read Operation Precharge Timing During Read OperationBurst Stop Command Precharge Timing During Write OperationBurst Write Operation MX29LV160BTTC Flash Application Block Diagram Command Definitions Write COMMANDS/COMMAND Sequences READ/RESET Command Reading Array Data WM8776 ApplicationAudio sample rate Slave mode Confidential do not Copy MT8293 Application Hdcp Decryption Tmds Digital CoreActive port detection Video Data Conversion and Video OutputI2c Interface to Display Controller TDA8946 ApplicationBlock diagram Input configuration Output power measurement Mode selection MT5351 ApplicationGeneral Feature List CGMS/WSS Confidential do not Copy MX29LV320BTTC Flash Application Confidential do not Copy Block Diagram BUS OPERATION--1 Write COMMANDS/COMMAND Sequences BUS OPERATION--2Table A. MX29LV320AT/B Command Definitions Standby Mode Reset OperationSoftware Command Definitions Write Protect WPWrite Operation Status Table B. Write Operation StatusFig C. Command Write Operation Fig D. Read Timing Waveforms Fig E. Reset Timing Waveform Block Diagram 16Mb x DDR Sdram NT5DS16M16CS-5T ApplicationFunctional Description Pin Configuration 400mil Tsop II x4 / x8 Mode Register Operation Operating Mode Extended Mode Register Extended Mode Register DefinitionTruth Table a Commands ActiveAuto Refresh ReadWrite Self RefreshOperations ReadsRandom Read Accesses CAS Latencies Burst Length = 2, 4 or Read Command Write Command Data Input Write Data Output Read Waveforms PC MODE1366X768 60HZCH1 Green # FB27 CH2 Vgavsync L22 CH1 Vgal R193 CH2 Avol R194 CH1 PCL CE70+ PCL CE70 AV&TV Mode AV1/AV2/TV Video Confidential do not Copy CH1 Dacbclk U23 PIN4 CH1 Dacmclk U23 PIN5 Component Mode Component 1/2 CH1YCBCRL2L19 CH2 2A33 U22 PIN11 CH1 AVL CE71+CH2 Auspl R304 Hdmi 1&2 Confidential do not Copy DTV HD Confidential do not Copy CH1 Vovsync DU9 PIN W1 CH1 Vode DU9 PIN W2 CH1 Vopclk DU9 PIN Trouble shooting Monitor Display Nothing PC ModeTV, Composite VIDEO1, 2, S-VIDEO is not Display Correctly COMPONENT1, 2 is not Display Correctly Hdmi is not Display Correctly Trouble of DC-DC Converter Trouble of DDC Reading Block Diagram System Block Diagram Wxga panelConfidential do not Copy Main Board Block Diagram Page Page Page Page Page Page Page