Yamaha YMF744B (DS-1S) specifications 3Fh Maximum Latency, 40-41h Legacy Audio Control

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YMF744B

3Fh: Maximum Latency

Read Only

Default: 19h

Access Bus Width: 8, 16, 32-bit

b7

b6

b5

b4

b3

b2

b1

b0

Maximum Latency

b[7:0] ..........Maximum Latency

This register indicates how often DS-1S generates the Bus Master Request.

This register is hardwired to 19h.

40-41h: Legacy Audio Control

Read / Write

Default: 907Fh

Access Bus Width: 8, 16, 32-bit

b15

b14

b13

b12

b11

b10

b9

b8

b7

b6

b5

b4

b3

b2

b1

b0

LAD

SIEN

MPUIRQ

SBIRQ

SDMA

I/O

MIEN

MEN

GPEN

FMEN

SBEN

b0................SBEN: Sound Blaster Enable

This bit enables the mapping of the Sound Blaster Pro block in the I/O space specified by the SBIO bits, when LAD is set to “0”. The FM Synthesizer registers can be accessed via SB I/O space, while the SB block is enabled, even if FMEN is set to “0”.

	“0”: Disable the mapping of the SB block to the I/O space
	“1”: Enable the mapping of the SB block to the I/O space		(default)
b1................FMEN: FM Synthesizer Enable
	This bit enables the mapping of the FM Synthesizer block in the I/O space specified by the FMIO bits,
	when LAD is set to “0”. FM Synthesizer registers can be accessed via SB I/O space, while the SB block
	is enabled, even if FMEN is set to “0”.
	“0”: Disable the mapping of the FM Synthesizer block to the FMIO space
	“1”: Enable the mapping of the FM Synthesizer block to the FMIO space (default)
	After setting FMEN to “1”, about 100 msec is necessary before accessing these I/O space.
b2	................GPEN: Gameport Enable
	This bit enables the mapping of the Joystick block in the I/O space specified by the JSIO bits, when LAD
	is set to “0”.
	“0”: Disable the mapping of the Joystick block
	“1”: Enable the mapping of the Joystick block	(default)
b3	................MEN: MPU401 Enable
	This bit enables the mapping of the MPU401 block in the I/O space specified by the MPUIO bits, when
	LAD is set to “0”.
	“0”: Disable the mapping of the MPU401 block
	“1”: Enable the mapping of the MPU401 block	(default)

February 3, 1999

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Contents Features PreliminaryOverview Sensaura LogosGM system level February 3PIN Configuration YMF744B-V 0.5mm pin pitchYMF744B-R 0.4mm pin pitch PIN Description PCI Bus Interface 54-pinAC’97 Interface 8-pin External Audio Interface 5-pin Legacy Device Interface 15-pinMiscellaneous 11-pin Power Supply 22-pin Reserve Pin 13-pinBlock Diagram PC/PCI IRQMaster Device Mode PCI Bus CommandTarget Device Mode Function OverviewPCI Configuration Register 5C-5Fh04-05h Command 00-01h Vendor ID02-03h Device ID 06-07h Status 0Ah Sub-class Code 08h Revision ID09h Programming Interface 0Bh Base Class Code0Dh Latency Timer 0Eh Header Type10-13h PCI Audio Memory Base Address 18-1Bh Legacy Audio I/O Base Address Dummy for Joystick B0................IO Read OnlyB150 ........Subsystem Vendor ID 2C-2Dh Subsystem Vendor ID2E-2Fh Subsystem ID B150 ........Subsystem ID3Dh Interrupt Pin 34h Capability Register Pointer3Ch Interrupt Line 3Eh Minimum Grant3Fh Maximum Latency 40-41h Legacy Audio ControlB76 ..........SDMA Sound Blaster DMA-8 Channel Select B4................MIEN MPU401 IRQ EnableB5................I/O I/O Address Aliasing Control B108 ........SBIRQ Sound Blaster IRQ Channel Select42-43h Extended Legacy Audio Control B14..............SIEN Serialized IRQ enableB1211 ......SMOD SB DMA mode B8................MAIM MPU401 Acknowledge Interrupt Mask44-45h Subsystem Vendor ID Write Register 46-47h Subsystem ID Write RegisterWrst AC’97 Warm Reset Read / Write Default 0001h Access Bus Width 8, 16, 32-bitCrst AC’97 Software Reset Signal Control 48-49h DS-1S Control4A-4Bh DS-1S Power Control 4C-4Dh D-DMA Slave Configuration 4E-4Fh DS-1S Power Control Psacl Power Save AC-Link Psio Power Save I/O PadB12 50h Capability ID B70 ..........Capability ID Capability Identifier52-53h Power Management Capabilities 54-55h Power Management Control / Status51h Next Item Pointer 58-59h Acpi Mode 5A-5Bh DS-1S Secondary AC’97 Power Control60-61h FM Synthesizer Base Address 62-63h Sound Blaster Base AddressB151 ........MPU401 Base Address 64-65h MPU401 Base Address66-67h Joystick Base Address B150 ........Joystick Base AddressISA Compatible Device DS-1S FM Synthesizer Block Status RegisterFM Synthesizer Status Register RO FM Synthesizer Data Register FM Synthesizer Data Register Array 0 R/WFM Synthesizer Data Register Array 1 R/W Sound Blaster Pro Block DSP Command CMDSound Blaster Pro Mixer SB Mixer DSPVolume for Midi SB Mixer AC’97SM Scan Mode B0................SBPDR Sound Blaster Power Down RequestSE Scan Enable Sbpda Sound Blaster Power Down AcknowledgementF3h Current FM Synthesizer Array F1h Scan In/ Out DataF2h Current FM Synthesizer Index F4h FM Synthesizer / MPU401 StatusFfemp FM Synthesizer Empty Joystick F8h Interrupt Flag RegisterMPU401 SB IRQ StatusDMA Emulation Protocol PC/PCIDMA Interrupt Routing Serialized IRQHardware Volume Control Digital Audio Interface SpdifZoomed Video Port Sclk Data LrckMultiple AC’97 & Multi-Channel AC’97 Digital DockingChannel Speaker System Electrical Characteristics Absolute Maximum RatingsRecommended Operating Conditions DC Characteristics AC Characteristics ResetMaster Clock PCI Interface PCI Clock timingAC’97 Master Clock Master Clock timing for AC’97AC-link AC-link timingZoomed Video Port Zoomed Video Port timingExternal Dimensions Unit mm February 3YMF744B-R Yamaha Corporation