Yamaha YMF744B (DS-1S) specifications F0h Scan In/ Out Control, SE Scan Enable, SM Scan Mode

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YMF744B

2-2-3. SB Suspend / Resume

The SB block can read the internal state as to support Suspend and Resume functions. The internal state is made up of 268 flip flops. To read the state, these states are shifted in order and read 8 bits at a time from the SCAN DATA register.

These registers are mapped to the SB Mixer space (see SB Mixer Register map). The registers have the following functions.

F0h: Scan In/ Out Control

Read / Write

Default: 00h

b7	b6	b5	b4	b3	b2	b1	b0

SBPDA	-	-	-	SS	SM	SE	SBPDR

b0................SBPDR: Sound Blaster Power Down Request

This bit stops the internal state of the Sound Blaster block.

“0”: Normal(default)

“1”: Stop

b1	SE: Scan Enable

This bit Shifts the internal state by 1 bit. Setting a “1” followed by a “0” shifts the internal state.

b2	SM: Scan Mode

This bit sets whether to read or write the state.

“0”: Write(default)

“1”: Read

b3	SS: Scan Select

This bit gives permission to read or write the internal data to the SCAN DATA register.

“0”: Normal operation (Do not allow read or write). (default)

“1”: Allow read and write.

b7	SBPDA: Sound Blaster Power Down Acknowledgement

This bit indicates that the SB Block is ready to read or write to the internal state after setting SBPDR. This bit is read only.

“0”: Read/Write not possible

“1”: Read/ Write possible

February 3, 1999

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Contents Preliminary FeaturesOverview Logos GM system levelSensaura February 3PIN Configuration YMF744B-V 0.5mm pin pitchYMF744B-R 0.4mm pin pitch PCI Bus Interface 54-pin PIN DescriptionAC’97 Interface 8-pin Legacy Device Interface 15-pin External Audio Interface 5-pinMiscellaneous 11-pin Power Supply 22-pin Reserve Pin 13-pinBlock Diagram PC/PCI IRQPCI Bus Command Target Device ModeMaster Device Mode Function OverviewPCI Configuration Register 5C-5Fh00-01h Vendor ID 04-05h Command02-03h Device ID 06-07h Status 08h Revision ID 09h Programming Interface0Ah Sub-class Code 0Bh Base Class Code0Eh Header Type 0Dh Latency Timer10-13h PCI Audio Memory Base Address 18-1Bh Legacy Audio I/O Base Address Dummy for Joystick B0................IO Read Only2C-2Dh Subsystem Vendor ID 2E-2Fh Subsystem IDB150 ........Subsystem Vendor ID B150 ........Subsystem ID34h Capability Register Pointer 3Ch Interrupt Line3Dh Interrupt Pin 3Eh Minimum Grant3Fh Maximum Latency 40-41h Legacy Audio ControlB4................MIEN MPU401 IRQ Enable B5................I/O I/O Address Aliasing ControlB76 ..........SDMA Sound Blaster DMA-8 Channel Select B108 ........SBIRQ Sound Blaster IRQ Channel SelectB14..............SIEN Serialized IRQ enable B1211 ......SMOD SB DMA mode42-43h Extended Legacy Audio Control B8................MAIM MPU401 Acknowledge Interrupt Mask44-45h Subsystem Vendor ID Write Register 46-47h Subsystem ID Write RegisterRead / Write Default 0001h Access Bus Width 8, 16, 32-bit Crst AC’97 Software Reset Signal ControlWrst AC’97 Warm Reset 48-49h DS-1S Control4A-4Bh DS-1S Power Control 4C-4Dh D-DMA Slave Configuration 4E-4Fh DS-1S Power Control Psio Power Save I/O Pad Psacl Power Save AC-LinkB12 50h Capability ID B70 ..........Capability ID Capability Identifier54-55h Power Management Control / Status 52-53h Power Management Capabilities51h Next Item Pointer 58-59h Acpi Mode 5A-5Bh DS-1S Secondary AC’97 Power Control60-61h FM Synthesizer Base Address 62-63h Sound Blaster Base Address64-65h MPU401 Base Address 66-67h Joystick Base AddressB151 ........MPU401 Base Address B150 ........Joystick Base AddressISA Compatible Device DS-1S Status Register FM Synthesizer BlockFM Synthesizer Status Register RO FM Synthesizer Data Register Array 0 R/W FM Synthesizer Data RegisterFM Synthesizer Data Register Array 1 R/W Sound Blaster Pro Block DSP Command CMDSound Blaster Pro Mixer SB Mixer DSPVolume for Midi SB Mixer AC’97B0................SBPDR Sound Blaster Power Down Request SE Scan EnableSM Scan Mode Sbpda Sound Blaster Power Down AcknowledgementF1h Scan In/ Out Data F2h Current FM Synthesizer IndexF3h Current FM Synthesizer Array F4h FM Synthesizer / MPU401 StatusFfemp FM Synthesizer Empty F8h Interrupt Flag Register MPU401Joystick SB IRQ StatusDMA Emulation Protocol PC/PCIDMA Interrupt Routing Serialized IRQHardware Volume Control Digital Audio Interface SpdifZoomed Video Port Sclk Data LrckAC’97 Digital Docking Multiple AC’97 & Multi-ChannelChannel Speaker System Absolute Maximum Ratings Electrical CharacteristicsRecommended Operating Conditions DC Characteristics Reset AC CharacteristicsMaster Clock PCI Interface PCI Clock timingAC’97 Master Clock Master Clock timing for AC’97AC-link AC-link timingZoomed Video Port Zoomed Video Port timingExternal Dimensions Unit mm February 3YMF744B-R Yamaha Corporation