Yamaha YMF744B (DS-1S) 60-61h FM Synthesizer Base Address, 62-63h Sound Blaster Base Address

YMF744B

b4	................SPR4: Secondary AC’97 Power Down Control 4
	This bit controls the power state of the AC-linkin the Secondary AC’97.
	“0”: Normal	(default)
	“1”: Power down
b5	................SPR5: Secondary AC’97 Power Down Control 5
	Setting this bit to “1” disables the internal clock of the Secondary AC’97. In case the AC’97 is used with
	DS-1S, the master clock is supplied from DS-1S. Therefore, when the clock is stopped completely, set
	SPR5 bits to “1” firstly, then the CMCD bit should be set to “1” after duration of 20µs or longer.
	“0”: Normal	(default)
	“1”: Disable
b6	................SPR6: Secondary AC’97 Power Down Control 6
	This bit controls PR6 bit status of the power control register in the Secondary AC’97.
b7	................SPR7: Secondary AC’97 Power Down Control 7

This bit controls PR7 bit status of the power control register in the Secondary AC’97.

Respective data set to b[7:0] are correspondingly set into the “Power down Control/Status” register in the Secondary AC’97 via the AC-Link. These are not set into the power down register in the Primary AC’97.

60-61h: FM Synthesizer Base Address

Read / Write

Default: 0000h

Access Bus Width: 8, 16, 32-bit

b15

b14

b13

b12

b11

b10

b9

b8

b7

b6

b5

b4

b3

b2

b1

b0

FM Synthesizer Base Address

-

-

b[15:2] ........FM Synthesizer Base Address

This register sets the base address of the FM synthesizer. If b5:I/O bit of 40h register is set to “1”, b[9:2]

bits are decoded by ignoring b[15:10] bits.

62-63h: Sound Blaster Base Address

Read / Write

Default: 0000h

Access Bus Width: 8, 16, 32-bit

b15

b14

b13

b12

b11

b10

b9

b8

b7

b6

b5

b4

b3

b2

b1

b0

Sound Blaster Base Address

-

-

-

-

b[15:4] ........Sound Blaster Base Address

This register sets the base address of the Sound Blaster. If b5:I/O bit of 40h register is set to “1”, b[9:4]

bits are decoded by ignoring b[15:10] bits.

February 3, 1999

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