Yamaha YMF744B (DS-1S) specifications 4A-4Bh DS-1S Power Control

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YMF744B

4A-4Bh: DS-1S Power Control 1

Read / Write

Default: 0000h

Access Bus Width: 8, 16, 32-bit

b15

b14

b13

b12

b11

b10

b9

b8

b7

b6

b5

b4

b3

b2

b1

b0

PR7

PR6

PR5

PR4

PR3

PR2

PR1

PR0

-

JSR

-

-

-

DPLL

-

DMC

b0

DMC: Disable Master Clock Oscillation

Setting this bit to “1” disables the oscillation of the Master Clock (24.576 MHz).

“0”: Normal

(default)

“1”: Disable

b2

DPLL: Disable PLL Clock Oscillation

Setting this bit to “1” disables the oscillation of PLL.

“0”: Normal

(default)

“1”: Disable

b6

JSR: Joystick Reset

This bit controls reset of the flip-flop circuit following the analog comparator stage on the joystick port.

The Initial value is set to “0” immediately after power on reset or hardware reset.

“0”: Normal

(default)

“1”: Resets the flip-flop circuit following the analog comparator stage on the joystick port

b8

PR0: AC’97 Power Down Control 0

This bit controls the power state of the ADC and Input Mux in the Primary AC’97.

	“0”: Normal	(default)
	“1”: Power down
b9	................PR1: AC’97 Power Down Control 1

This bit controls the power state of the DAC in the Primary AC’97.

“0”: Normal(default)

“1”: Power down

b10..............PR2: AC’97 Power Down Control 2

This bit controls the power state of the Analog Mixer (Vref still on) in the Primary AC’97. This power state retains the Reference Voltage of the AC’97.

“0”: Normal(default)

“1”: Power down

b11..............PR3: AC’97 Power Down Control 3

This bit controls the power state of the Analog Mixer (Vref off) in the Primary AC’97. This power state removes Reference Voltage of the AC’97.

“0”:	Normal	(default)
“1”:	Power down

February 3, 1999

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Contents Overview FeaturesPreliminary February 3 LogosGM system level SensauraYMF744B-V 0.5mm pin pitch PIN ConfigurationYMF744B-R 0.4mm pin pitch AC’97 Interface 8-pin PIN DescriptionPCI Bus Interface 54-pin Miscellaneous 11-pin External Audio Interface 5-pinLegacy Device Interface 15-pin Reserve Pin 13-pin Power Supply 22-pinPC/PCI IRQ Block DiagramFunction Overview PCI Bus CommandTarget Device Mode Master Device Mode5C-5Fh PCI Configuration Register02-03h Device ID 04-05h Command00-01h Vendor ID 06-07h Status 0Bh Base Class Code 08h Revision ID09h Programming Interface 0Ah Sub-class Code10-13h PCI Audio Memory Base Address 0Dh Latency Timer0Eh Header Type B0................IO Read Only 18-1Bh Legacy Audio I/O Base Address Dummy for JoystickB150 ........Subsystem ID 2C-2Dh Subsystem Vendor ID2E-2Fh Subsystem ID B150 ........Subsystem Vendor ID3Eh Minimum Grant 34h Capability Register Pointer3Ch Interrupt Line 3Dh Interrupt Pin40-41h Legacy Audio Control 3Fh Maximum LatencyB108 ........SBIRQ Sound Blaster IRQ Channel Select B4................MIEN MPU401 IRQ EnableB5................I/O I/O Address Aliasing Control B76 ..........SDMA Sound Blaster DMA-8 Channel Select B8................MAIM MPU401 Acknowledge Interrupt Mask B14..............SIEN Serialized IRQ enable B1211 ......SMOD SB DMA mode 42-43h Extended Legacy Audio Control46-47h Subsystem ID Write Register 44-45h Subsystem Vendor ID Write Register48-49h DS-1S Control Read / Write Default 0001h Access Bus Width 8, 16, 32-bitCrst AC’97 Software Reset Signal Control Wrst AC’97 Warm Reset4A-4Bh DS-1S Power Control 4C-4Dh D-DMA Slave Configuration 4E-4Fh DS-1S Power Control B12 Psacl Power Save AC-LinkPsio Power Save I/O Pad B70 ..........Capability ID Capability Identifier 50h Capability ID51h Next Item Pointer 52-53h Power Management Capabilities54-55h Power Management Control / Status 5A-5Bh DS-1S Secondary AC’97 Power Control 58-59h Acpi Mode62-63h Sound Blaster Base Address 60-61h FM Synthesizer Base AddressB150 ........Joystick Base Address 64-65h MPU401 Base Address66-67h Joystick Base Address B151 ........MPU401 Base AddressISA Compatible Device DS-1S FM Synthesizer Status Register RO FM Synthesizer BlockStatus Register FM Synthesizer Data Register Array 1 R/W FM Synthesizer Data RegisterFM Synthesizer Data Register Array 0 R/W Sound Blaster Pro Block CMD DSP CommandSB Mixer DSP Sound Blaster Pro MixerSB Mixer AC’97 Volume for MidiSbpda Sound Blaster Power Down Acknowledgement B0................SBPDR Sound Blaster Power Down RequestSE Scan Enable SM Scan ModeF4h FM Synthesizer / MPU401 Status F1h Scan In/ Out DataF2h Current FM Synthesizer Index F3h Current FM Synthesizer ArrayFfemp FM Synthesizer Empty SB IRQ Status F8h Interrupt Flag RegisterMPU401 JoystickPC/PCI DMA Emulation ProtocolDMA Serialized IRQ Interrupt RoutingHardware Volume Control Spdif Digital Audio InterfaceSclk Data Lrck Zoomed Video PortChannel Speaker System Multiple AC’97 & Multi-ChannelAC’97 Digital Docking Recommended Operating Conditions Electrical CharacteristicsAbsolute Maximum Ratings DC Characteristics Master Clock AC CharacteristicsReset PCI Clock timing PCI InterfaceMaster Clock timing for AC’97 AC’97 Master ClockAC-link timing AC-linkZoomed Video Port timing Zoomed Video PortUnit mm February 3 External DimensionsYMF744B-R Yamaha Corporation