Sony MZ-R90/R91, MT-MZR70-165 service manual

Page 38

Pin No.

Pin Name

I/O

 

 

Pin Description

 

 

 

 

53

VDIO1

Power supply terminal (+2.4 V) (for I/O)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

54

VSIO1

Ground terminal (for I/O)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

55 to 59

A00, A07, A10,

O

Address signal output to the external D-RAM

Not used (open)

 

 

A08, A09

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

60

 

 

 

 

 

 

 

 

 

 

O

Row address strobe signal output to the external D-RAM

“L” active

Not used (open)

XRAS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

61

 

 

 

 

 

 

 

 

 

O

Output enable signal output terminal for internal D-RAM

“L” active

Not used (open)

 

 

 

IXOE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

62

 

 

 

 

 

 

 

 

O

Data write enable signal output terminal for internal D-RAM

“L” active

Not used (open)

 

 

IXWE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

63

 

 

 

 

 

 

 

O

Column address strobe signal output to the external D-RAM

“L” active

Not used (open)

 

XCAS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

64 to 67

D1, D2, D0, D3

I/O

Two-way data bus with the external D-RAM Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

68

 

 

VDC3

Power supply terminal (+1.8 V) (for internal logic)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

69

 

 

 

VSC3

Ground terminal (for internal logic)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

70

 

 

 

 

A11

O

Address signal output to the external D-RAM

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

71

 

 

 

 

 

 

 

O

Output enable signal output to the external D-RAM “L” active Not used (open)

 

 

 

 

XOE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

72

 

 

 

 

 

O

Data write enable signal output to the external D-RAM

“L” active

Not used (open)

 

 

 

XWE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

73

 

 

MVCI

I (S)

Digital in PLL oscillation input from the external VCO

Not used (fixed at “L”)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

74

ASYO

O (A)

Playback EFM full-swing output terminal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

75

 

 

 

ASYI

I (A)

Playback EFM asymmetry comparator voltage input terminal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

76

 

 

AVD1

Power supply terminal (+2.4 V) (analog system)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

77

 

 

 

BIAS

I (A)

Playback EFM asymmetry circuit constant current input terminal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

78

 

 

 

 

RFI

I (A)

Playback EFM RF signal input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

79

 

 

 

AVS1

Ground terminal (analog system)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

80

 

 

 

 

PCO

O (3)

Phase comparison output for master clock of the recording/playback EFM master PLL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

81

 

 

 

 

FILI

I (A)

Filter input for master clock of the recording/playback EFM master PLL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

82

 

 

 

FILO

O (A)

Filter output for master clock of the recording/playback EFM master PLL

 

 

 

 

 

 

 

 

 

 

 

 

 

 

83

 

 

 

CLTV

I (A)

Internal VCO control voltage input of the recording/playback EFM master PLL

 

 

 

 

 

 

 

 

 

 

 

 

 

84

 

 

PEAK

I (A)

Light amount signal (RF/ABCD) peak hold input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

 

 

 

 

85

BOTM

I (A)

Light amount signal (RF/ABCD) bottom hold input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

86

ABCD

I (A)

Light amount signal (ABCD) input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

87

 

 

 

 

FE

I (A)

Focus error signal input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

88

 

 

AUX1

I (A)

Auxiliary signal (I3 signal/temperature signal) input terminal

Not used (fixed at “H”)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

89

 

 

 

 

VC

I (A)

Middle point voltage (+1.2 V) input terminal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

90

 

 

 

ADIO

O (A)

Monitor output of the A/D converter input signal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

91

 

ADRT

I (A)

A/D converter operational range upper limit voltage input terminal (fixed at “H” in this set)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

92

 

 

AVD2

Power supply terminal (+2.4 V) (analog system)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

93

 

 

 

AVS2

Ground terminal (analog system)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

94

ADRB

I (A)

A/D converter operational range lower limit voltage input terminal (fixed at “L” in this set)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

95

 

 

 

 

SE

I (A)

Sled error signal input terminal

Not used (fixed at “L”)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

96

 

 

 

 

TE

I (A)

Tracking error signal input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

97

DCHG

I (A)

Connected to the +2.4 V power supply

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

98

 

 

 

 

APC

I (A)

Error signal input for the laser automatic power control

Not used (fixed at “H”)

 

 

 

 

 

 

 

 

 

 

 

 

 

99

 

ADFG

I (A)

ADIP duplex FM signal (22.05 kHz ± 1 kHz) input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

100

VDIO2

Power supply terminal (+2.4 V) (for I/O)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

101

VSIO2

Ground terminal (for I/O)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

102

F0CNT

O

Filter f0 control signal output terminal Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

103

 

 

XLRF

O

Serial latch signal output terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

104

 

 

CKRF

O

Serial clock signal output terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

105

 

 

DTRF

O

Writing data output terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

106

APCREF

O

Control signal output to the reference voltage generator circuit for the laser automatic power

control

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

107

 

LDDR

O

PWM signal output for the laser automatic power control

Not used (open)

 

* I (S) stands for schmitt input, I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O

– 46 –

Image 38
Contents AEP Model US ModelCanadian Model UK ModelFlexible Circuit Board Repairing Notes on chip component replacementTABLE OF CONTENTS NOTES ON HANDLING THE OPTICAL PICK-UPBLOCK LCX-2R SECTION SERVICING NOTENOTES ON LASER DIODE EMISSION CHECK OPTICAL PICK-UPFLEXIBLE BOARDSECTION 2 GENERAL Page Page SECTION DISASSEMBLY 3-3.LCD MODULE 3-4.MAIN BOARDover write head section 3-6.SERVICE ASSY, OP3-5.MD MECHANISM DECK MT-MZR70-165 3-7.HOLDER ASSY 3-8.MOTOR FLEXIBLE BOARD3-9.MOTOR, DC M602 3-10.“MOTOR, DC M601”, “MOTOR, DC M603”4-2-1.Setting Method of Test Mode SECTION 4 TEST MODE4-2-2.Operation in Setting the Test Mode 888xxxxxxxxxFREC1SHUF000M a n u a l 011 0 6 3 B 011 C 6 8 S011 0 F FJ 011 0 5 9 A000S t a t 000A d r s 000B E m p 000# # # # # # 000P * * RE I B 000P * * R 000B O v r 000B f u l 000R t r y000N - 1 000N - 1 000N - 2 000N - 2 000N 0001 s t0001 s t 0001 s t 0001 s t 000R # # # #Description of Error Indication Codes • Description of Indication History4-7.KEY CHECK MODE 021R e s O K ? SECTION ELECTRICAL ADJUSTMENTS021R e s N 021R e s763V r h V c l 762V c l P W M765V c h P W M 766V r h V c hC D R U N 014S e t T m p000 A s s y 341 C D O KConnection 043R e s u m e043R e s C l r Check MethodConnecting Location SECTION DIAGRAMSMZ-R70 MZ-R70 Waveforms 6-3.BLOCK DIAGRAM - POWER SUPPLY SECTIONMZ-R70 Page Page Refer to page 41 for IC Block Diagrams MZ-R70MZ-R70 MZ-R70 IC302 IC501SN761056 NJM2173IC603 IC601MPC17A56FTA MPC18A21MTBAK4517-VQ-L IC901 MPC18A31FTAIC301 6-9.IC PIN DESCRIPTIONS MAIN BOARD IC502 CXD2660GA Page Page Page Page Page SECTION EXPLODED VIEWS Page SECTION ELECTRICAL PARTS LIST MAINMAIN MAIN MAIN MAIN Personal Audio Division Company Sony CorporationMZ-R70 Published by General Engineering DeptVer US Model Canadian Model AEP Model UK ModelE Model Australian Model Chinese Model Subject Taiwan model Addition