Sony MZ-R91 VDIO1, VSIO1, Xras, Ixoe, Ixwe, Xcas, VDC3, VSC3, Xoe, Xwe, Mvci, Asyo, Asyi, AVD1

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Pin No.

 

Pin Name

I/O

 

Description

 

 

 

 

 

 

 

 

 

 

46

 

FS256

O

Clock signal (11.2896 MHz) output to the A/D, D/A converter (IC301) (X' tal system)

 

 

 

 

 

 

 

 

 

 

 

 

47 to 52

 

A03, A04, A02,

O

Address signal output to the external D-RAM

Not used (open)

 

 

 

A05, A01, A06

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

53

 

VDIO1

Power supply terminal (+2.4V) (for I/O)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

54

 

VSIO1

Ground terminal (for I/O)

 

 

 

 

 

 

55 to 59

 

A00, A07, A10.

O

Address signal output to the external D-RAM

Not used (open)

 

 

 

A08, A09

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

60

 

XRAS

O

Row address strobe signal output to the external D-RAM

“L” active

Not used (open)

 

 

 

 

 

 

 

 

61

 

IXOE

O

Output enable signal output terminal for internal D-RAM

“L” active

Not used (open)

 

 

 

 

 

 

 

 

62

 

IXWE

O

Data write enable signal output terminal for internal D-RAM

“L” active

Not used (open)

 

 

 

 

 

 

 

 

63

 

XCAS

O

Column address strobe signal output to the external D-RAM

“L” active

Not used (open)

 

 

 

 

 

 

 

 

64 to 67

 

D1, D2, D0, D3

I/O

Two-way data bus with the external D-RAM

Not used (open)

 

 

68

 

VDC3

Power supply terminal (+1.8V) (for internal logic)

 

 

 

 

69

 

VSC3

Ground terminal (for internal logic)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

70

 

 

A11

O

Address signal output to the external D-RAM

Not used (open)

 

 

 

 

 

 

 

71

 

XOE

O

Output enable signal output to the external D-RAM “L” active Not used (open)

 

 

 

 

 

 

 

 

72

 

XWE

O

Data write enable signal output to the external D-RAM

“L” active

Not used (open)

 

 

 

 

 

 

73

 

MVCI

I (S)

Digital in PLL oscillation input from the external VCO

Not used (fixed at “L”)

74

 

ASYO

O (A)

Playback EFM full-swing output terminal

 

 

 

 

 

75

 

ASYI

I (A)

Playback EFM asymmetry comparator voltage input terminal

 

 

 

 

 

 

 

 

 

 

 

 

76

 

AVD1

Power supply terminal (+2.4V) (analog system)

 

 

 

 

 

 

 

 

 

 

 

77

 

BIAS

I (A)

Playback EFM asymmetry circuit constant current input terminal

 

 

 

 

 

 

 

 

 

 

78

 

 

RFI

I (A)

Playback EFM RF signal input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

 

 

 

 

79

 

AVS1

Ground terminal (analog system)

 

 

 

 

 

 

80

 

PCO

O (3)

Phase comparison output for master clock of the recording/playback EFM master PLL

81

 

FILI

I (A)

Filter input for master clock of the recording/playback EFM master PLL

 

 

 

 

 

 

 

82

 

FILO

O (A)

Filter output for master clock of the recording/playback EFM master PLL

 

 

 

 

 

 

83

 

CLTV

I (A)

Internal VCO control voltage input of the recording/playback EFM master PLL

 

 

 

 

 

84

 

PEAK

I (A)

Light amount signal (RF/ABCD) peak hold input from the SN761056ADBT (IC501)

 

 

 

 

 

85

 

BOTM

I (A)

Light amount signal (RF/ABCD) bottom hold input from the SN761056ADBT (IC501)

86

 

ABCD

I (A)

Light amount signal (ABCD) input from the SN761056ADBT (IC501)

 

87

 

 

FE

I (A)

Focus error signal input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

88

 

AUX1

I (A)

Auxiliary signal (I3 signal/temperature signal) input terminal

Not used (fixed at “H”)

89

 

 

VC

I (A)

Middle point voltage (+1.2V) input terminal

 

 

 

 

 

 

 

 

 

 

 

 

90

 

ADIO

O (A)

Monitor output of the A/D converter input signal Not used (open)

 

 

 

 

 

 

 

91

 

ADRT

I (A)

A/D converter operational range upper limit voltage input terminal (fixed at “H” in this set)

92

 

AVD2

Power supply terminal (+2.4V) (analog system)

 

 

 

 

93

 

AVS2

Ground terminal (analog system)

 

 

 

 

 

 

94

 

ADRB

I (A)

A/D converter operational range lower limit voltage input terminal (fixed at “L” in this set)

 

 

 

 

 

 

 

 

 

 

95

 

 

SE

I (A)

Sled error signal input terminal Not used (fixed at “L”)

 

 

 

 

 

 

 

 

 

 

 

 

 

96

 

 

TE

I (A)

Tracking error signal input from the SN761056ADBT (IC501)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

97

 

DCHG

I (A)

Connected to the +2.4V power supply

 

 

 

 

 

 

98

 

APC

I (A)

Error signal input for the laser automatic power control

Not used (fixed at “H”)

99

 

ADFG

I (A)

ADIP duplex FM signal (22.05 kHz ±

1 kHz) input from the SN761056ADBT (IC501)

100

 

VDIO2

Power supply terminal (+2.4V) (for I/O)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

101

 

VSIO2

Ground terminal (for I/O)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

102

 

F0CNT

O

Filter f0 control signal output terminal

Not used (open)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

* I (S) stands for schmitt input, I (A) for analog input, O (3) for 3-state output, and O (A) for analog output in the column I/O

– 48 –

Image 32
Contents LCX-2R SpecificationsNEW Table of Contents DiagramsExploded Views Electrical Parts List Flexible Circuit Board RepairingSection Servicing Notes EepromHeadphones with a remote control RM-MZ2S SectionGeneral Location of ControlsUpper Panel Section Section DisassemblyPanel ASSY, Bottom MZ-R91 LCD MODULE, BUTTON, CONTROL, Service ASSY, Upper PanelMZ-R90 Main BOARD, Case ASSY, Battery Belt ASSY, OrnamentalService ASSY, OP Chassis ASSY, SET, MD Mechanism Deck MT-MZR90-165Holder Assy Motor Flexible BoardMOTOR, DC Sled M602 Test Mode Setting Method of Test ModeOperation in Setting the Test Mode Releasing the Test ModeA n u a l Configuration of Test ModeManual Mode Overall Adjustment Mode 011 0 F F J 0011 0 6 3 B 0 011 0 5 9 a 0Sound Skip Check Result Display Mode Setting method of Sound Skip Check Result Display ModeT a t T r ySelf-Diagnosis Display Mode 000 1 s tDescription of Error Indication Codes Clearing Self-Diagnosis Data and Total Recording TimeDescription of Indication History RECKey Check Mode Key IndicationSection Electrical Adjustments E s NE s O K ? E sC l P W M C h P W MR h V c l R h V c hE t T m p S S YD R U N D O KLaser Power Check O O KE s u m e E s C l rSection Diagrams Block Diagram Servo SectionSignal Path REC DigitalSignal Path Play Analog OUT REC Analog REC Digital Block Diagram A/D, D/A CONVERTER, Audio SectionBlock Diagram KEY CONTROL/DISPLAY/POWER Supply Section JEW Printed Wiring BoardSemiconductor Location MZ-R90/R91 IC Block Diagrams IC301 WaveformsIC501 SN761056ADBT IC304, 305 RN5RZ25AA-TRIC601 IC602IC902 IC603IC605 XC6367B103MR IC803 XC6383C301MR IC804 RV5C348A-E2 IC901IC PIN Function Description VDC0 SwdtSclk VSC0VDIO1 VSIO1Xras IxoeXlrf ApcrefLddr VDC4Sync REC Pause KEYSense WrpwrFfclr SleepTSB Edge GND SWHalf Lock RMC KEYSET KEY REC KEYHK, CH, JEW Section Exploded ViewsPanel Section MZ-R90 Panel Section MZ-R91 Chassis section Not supplied102 103 104 108 109 Chassis Section101 105 113 112 114 106 110 107 111 109 MD-MECHANISM Deck Section Electrical Parts List MainCeramic Chip 5PF CAP, ChipConnector FILTER, Chip EMI Common ModeCXD2660GA IC MPC17A56FTAEBFET HAT2051T-EL FET HAT2050T-ELFET Transistor ZDT6718TAOPEN/CLOSE Detect SwitchComposition Circuit Block SWITCH, Slide Hold SWITCH, Slide Synchro RECThermistor TH901 1-803-795-21 THERMISTOR, Positive Vibrator MiscellaneousMZ-R90/R91 Subject Addition of Korean Model CorrectionHong Kong Model Korean Model Electrical Parts ListExploded Views Indicates changed portion.EXPLODED Views 112 105 106 #114151 176 @ IC MPC17A56FTA IC MPC18A31FTAEB