Sony MDS-SD1 IC PIN Functions, IC101 CXA2523AR RF Amplifier BD Board, Pin No Pin Name Function

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6-18. IC PIN FUNCTIONS

• IC101 CXA2523AR (RF Amplifier) (BD Board)

Pin No.

 

Pin Name

I/O

 

 

 

Function

 

 

 

 

 

 

 

1

 

I

I

 

I-V converted RF signal I input from the optical pick-up block detector

 

 

 

 

 

 

2

 

J

I

 

I-V converted RF signal J input from the optical pick-up block detector

 

 

 

 

 

 

3

 

VC

O

 

Middle point voltage (+1.65V) generation output terminal

 

 

 

 

 

 

4 to 9

 

A to F

I

 

Signal input from the optical pick-up detector

 

 

 

 

 

 

10

 

PD

I

 

Light amount monitor input terminal

 

 

 

 

 

 

11

 

APC

O

 

Laser amplifier output terminal to the automatic power control circuit

 

 

 

 

 

 

12

 

APCREF

I

 

Reference voltage input terminal for setting laser power

 

 

 

 

 

 

 

 

13

 

GND

—

 

Ground terminal

 

 

 

 

 

 

 

 

14

 

TEMPI

I

 

Connected to the temperature sensor

 

 

 

 

 

 

15

 

TEMPR

O

 

Output terminal for a temperature sensor reference voltage

 

 

 

 

 

 

16

 

SWDT

I

 

Writing serial data input from the CXD2652AR (IC121)

 

 

 

 

 

 

17

 

SCLK

I

 

Serial clock signal input from the CXD2652AR (IC121)

 

 

 

 

 

 

18

 

XLAT

I

 

Serial latch signal input from the CXD2652AR (IC121)

 

 

 

 

 

 

 

19

 

 

 

I

 

Standby signal input terminal “L”: standby (fixed at “H” in this set)

 

XSTBY

 

 

 

 

 

 

 

 

20

 

F0CNT

I

 

Center frequency control voltage input terminal of internal circuit (BPF22, BPF3T, EQ)

 

 

input from the CXD2652AR (IC121)

 

 

 

 

 

 

 

 

 

 

 

 

21

 

VREF

O

 

Reference voltage output terminal Not used (open)

 

 

 

 

 

 

 

22

 

EQADJ

I

 

Center frequency setting

terminal for the internal circuit (EQ)

 

 

 

 

 

 

 

23

 

3TADJ

I

 

Center frequency setting

terminal for the internal circuit (BPF3T)

 

 

 

 

 

 

24

 

VCC

—

Power supply terminal (+3.3V)

 

 

 

 

 

 

 

 

25

 

WBLADJ

I

 

Center frequency setting

terminal for the internal circuit (BPF22)

 

 

 

 

 

 

26

 

TE

O

 

Tracking error signal output to the CXD2652AR (IC121)

 

 

 

 

 

 

27

 

CSLED

I

 

Connected to the external capacitor for low-pass filter of the sled error signal

 

 

 

 

 

 

28

 

SE

O

 

Sled error signal output to the CXD2652AR (IC121)

 

 

 

 

 

 

 

29

 

ADFM

O

 

FM signal output of the ADIP

 

 

 

 

 

 

 

30

 

ADIN

I

 

Receives a ADIP FM signal in AC coupling

 

 

 

 

 

 

31

 

ADAGC

I

 

Connected to the external capacitor for ADIP AGC

 

 

 

 

 

 

32

 

ADFG

O

 

ADIP duplex signal (22.05 kHz ± 1 kHz) output to the CXD2652AR (IC121)

 

 

 

 

 

 

33

 

AUX

O

 

Auxiliary signal (I3 signal/temperature signal) output to the CXD2652AR (IC121)

 

 

 

 

 

 

34

 

FE

O

 

Focus error signal output to the CXD2652AR (IC121)

 

 

 

 

 

 

35

 

ABCD

O

 

Light amount signal (ABCD) output to the CXD2652AR (IC121)

 

 

 

 

 

 

36

 

BOTM

O

 

Light amount signal (RF/ABCD) bottom hold output to the CXD2652AR (IC121)

 

 

 

 

 

 

37

 

PEAK

O

 

Light amount signal (RF/ABCD) peak hold output to the CXD2652AR (IC121)

 

 

 

 

 

 

38

 

RF

O

 

Playback EFM RF signal output to the CXD2652AR (IC121)

 

 

 

 

 

 

39

 

RFAGC

I

 

Connected to the external capacitor for RF auto gain control circuit

 

 

 

 

 

 

40

 

AGCI

I

 

Receives a RF signal in AC coupling

 

 

 

 

 

 

 

41

 

COMPO

O

 

User comparator output terminal

Not used (open)

 

 

 

 

 

 

 

42

 

COMPP

I

 

User comparator input terminal

Not used (fixed at “L”)

 

 

 

 

 

 

43

 

ADDC

I

 

Connected to the external capacitor for cutting the low band of the ADIP amplifier

 

 

 

 

 

 

44

 

OPO

O

 

User operational amplifier output terminal Not used (open)

 

 

 

 

 

 

45

 

OPN

I

 

User operational amplifier inversion input terminal Not used (fixed at “L”)

 

 

 

 

 

 

 

 

46

 

RFO

O

 

RF signal output terminal

 

 

 

 

 

 

 

 

47

 

MORFI

I

 

Receives a MO RF signal in AC coupling

 

 

 

 

 

 

 

48

 

MORFO

O

 

MO RF signal output terminal

 

 

 

 

 

 

 

 

 

 

– 64 –

Page 49 Page 51
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Page 49 Page 51
Contents MDM-5A SpecificationsMDS-JE520 MBU-5ASELF-DIAGNOSIS Function Items of Error History Mode Items and Contents Parts No Flexible Circuit Board RepairingSpecification Label Diagrams Table of ContentsDisassembly Exploded ViewsSection Servicing Note JIG for Checking BD Board WaveformRecord Precedure Checks Prior to Parts Replacement and Adjustments Criteria for Determination Measure if unsatisfactoryForced Reset Main Board Component SideCleaning of Objective Lens of Optical Pickup Fluorescent Indicator Tube and Mechanism DeckAttaching the Glass Assembly Fluorescent Indicator TUBE, LED Complete Lighting CheckServicing Position Cause of Retry Occurring conditions Retry Cause Display ModeHigher Bits Lower Bits Hexa BinaryHexadecimal Binary Bit When BinaryHigher Bits Lower Bits Hexa Details Section General Front Panel Location of Parts and ControlsFront Panel Section DisassemblyGlass Assy Slider CAM Base Unit and BD BoardSW Board and Loading Motor M103 Setting the Test Mode Section Test ModePrecautions for USE of Test Mode Exiting the Test ModeSelecting the Test Mode GroupFunctions of Other Buttons Operating the Continuous Playback ModeNon-Volatile Memory Mode EEP Mode Test Mode Displays Section Electrical Adjustments Parts Replacement and AdjustmentPrecautions for Adjustments Precautions for Checking Laser Diode EmissinonPrecautions for USE of Optical PICK- UP KMS-260A Creating Continuously Recorded DiscChecks Prior to Repairs Temperature Compensation Offset CheckLaser Power Check Specified ValueFocus Bias Check Play Checking MO Error Rate CheckCD Error Rate Check Self-Recording/playback CheckLaser Power Adjustment Initial Setting of Adjustment ValueTemperature Compensation Offset Adjutment Recording and Displaying the IOP InformationTraverse Adjustment Focus Bias Adjustment CD Auto Gain Control Output Level Adjustment Error Rate CheckAuto Gain Control Output Level Adjustment MO Auto Gain Control Output Level AdjustmentAdjusting Points and Connecting Points Section Diagrams Circuit Boards LocationPB Digital out Block Diagrams BD SectionMDS-SD1 REC DigitalRECDigital Main SectionPBDigital out Waveforms For schematic diagramsFor printed wiring boards Display SectionPrinted Wiring Board BD Section Semiconductor LocationSchematic Diagram BD 1/2 Section Schematic Diagram BD 2/2 Section Schematic Diagram Main 1/2 Section Schematic Diagram Main 2/2 Section Printed Wiring Board Main Section Schematic Diagram Panel Section Printed Wiring Board Panel Section Schematic Diagram Connector Section Printed Wiring Board Connector Section System Control To HCD-SD1MDS-SD1 IC Block Diagrams BD Section IC101IC301 LB1641 IC152 BH6511FS-E2Main Section IC201 UDA1341TS/N2 IC851 M5293L Connector Section IC774 P82B715TD.118IC822 M62016FP-E1 Pin No Pin Name Function IC PIN FunctionsIC101 CXA2523AR RF Amplifier BD Board IC701 M30610MC-A01FP System Control ∝CON Main Board CHAK-IN Section Exploded Views Case and Back Panel SectionPanel SW Board FL901 1-517-804-11 Indicator TUBE, FluorescentFront Panel Section 67 A-4724-619-A Panel BOARD, Complete209 4-988-466-21 Spring ELECTROSTATIC, Leaf Mechanism Deck Section MDM-5AInsulator F Motor ASSY, Sled Base Unit Section MBU-5AHEAD, Over Light Section Electrical Parts List Connector Connector Encoder Main Main FILTER, Line InductorLine Filter FeritePanel Panel SW MANUAL, Instruction CHINESESP,HK Hardware List Accessories & Packing Materials FILTER, Clamp Ferrite CoreMANUAL, Instruction English Screw +BSony Corporation
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