• IC1 M30805SGP SYSTEM CONTROL (MAIN BOARD)
Pin No. | Pin Name | I/O | Function |
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1 | DATA(FL) | O | Serial data signal output to the display driver. |
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2 | CLK(FL) | O | Serial clock signal output to the display driver. L: Active |
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3 | I | A1 Control input. (Fixed at L) | |
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4 | SIRCS | I | Remote control input. |
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5 to 7 | NC | — | Not used. |
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8 | MUTE | O | Line out muting output. L: Mute |
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9 | AD/DA RESET | O | Reset signal output to the AK4524. L: Active |
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10 | AD/DA LATCH | O | Latch signal output to the AK4524. L: Active |
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11 | O | Loading motor voltage control output L: High voltage H: Low voltage | |
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12 | LDIN | I | Loading motor control input. H: IN |
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13 | LDOUT | O | Loading motor control output. H: OUT |
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14 | MOD | O | Laser modulation switching signal output. L: OFF H: ON |
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15 | BYTE | I | Data bus changed input. (Connected to ground.) |
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16 | CNVSS | — | Ground. |
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17 | O | Not used . | |
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18 | O | Not used . | |
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19 | RESET | I | System rest input. L : ON |
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20 | XOUT | O | Main clock output. (10MHz) |
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21 | VSS | — | Ground. |
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22 | XIN | I | Main clock input. (10MHz) |
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23 | VCC | — | Power supply. (+3.3V) |
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24 | NMI | I | Fixed at H. |
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25 | DQSY | I | Digital in sync input. (Record system) |
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26 | P.DOWN | I | Power down detection input. L: Power down |
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27 | SQSY | I | ADIP (MO) sync or subcode Q (PIT) sync input from CXD2662R.(Playback system) |
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28 | I | Keyboard clock input. | |
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29 | LDON | O | Laser ON/OFF control output. H: Laser ON |
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30 | I | Detection input from the limit switch. L: Sled | |
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31 | A1 OUT | O | A1 Control output. |
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32 | XINIT | I | Interrupt status input from CXD2662R. |
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33 | BEEP | O | Beep output. |
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34 | LRCKI | I | LR clock input. |
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35 | WR PWR | O | Write power ON/OFF output. L: OFF H: ON |
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36 | IIC CLK | I/O | IIC serial clock input/output. |
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37 | IIC DATA | I/O | IIC serial data input/output. |
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38 | SWDT | O | Writing data signal output to the serial bus. |
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39 | VCC | — | Power supply. (+3.3V) |
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40 | SRDT | I | Reading data signal input from the serial bus. |
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41 | VSS | — | Ground. |
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42 | SCLK | O | Clock signal output to the serial bus. |
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43 | I | Detection signal input from the recording position detection switch. L: REC | |
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44 | CLIP DATA | O | CLIP serial data output. |
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45 | RX0(CLIP) | I | CLIP serial data input. |
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46 | CLIP CLK | O | CLIP serial clock output. |
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47 | O | Digital rest signal output to the CXD2662R and motor driver. L: Reset | |
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48 | SENS | I | Internal status (SENSE) input from the CXD2662R. |
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49 | I | Detection signal input from the playback position detection switch. L: PLAY | |
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50 | XLATCH | O | Latch signal output to the serial bus. |
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51 | I | Detection signal input from the loading out detection switch. | |
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52 | RDY | I | Fixed at H. |
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53 | ALE/RAS | O | Microprocessor mode output. (Not used.) |
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54 | HOLD | I | Fixed at H. |
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