INDEX
S
SDRAM
chip select pin (FLAG8),
control signals,
serial peripheral interconnect (SPI) flash memory, xi, xii,
session startup,
SRU2 (DPI interface),
spacing headers,
SPDIF input/output, xii receiver,
SPI
master/slave boot modes,
SRAM
async memory controller,
via external port,
SW12 (reset) push button,
SW1 (oscilloscope) switch,
SW2 (boot mode select) switch,
SW7 (push buttons enable) DIP switch,
See SDRAM
synchronous random access memory, See SRAM system architecture, of this
T
technical/customer support, xiv test switches (SW6, SW14),
U
universal asynchronous receiver/transmitter (UART)
enable switch (SW5),
USB
cable,
V
VisualDSP++ documentation, xx online Help, xix
voltage,
voltage controlled oscillator (VCO) select jumper (JP1),
|