Analog Devices ADSP-21369 system manual Jtag Header P2

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EZ-KIT Lite Hardware Reference

JTAG Header (P2)

The JTAG header (P2) is the connecting point for a JTAG in-circuit emu- lator pod. When an emulator is connected to the JTAG header, the USB debug interface is disabled.

Pin 3 is missing to provide keying. Pin 3 in the mating connector should have a plug.

When using an emulator with the EZ-KIT Lite board, follow the connection instructions provided with the emulator.

Part Description	Manufacturer	Part Number


14-pin IDC Header	Berg	54102-T08-07

ADSP-21369 EZ-KIT Lite Evaluation System Manual

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Contents ADSP-21369 EZ-KIT Lite Evaluation System Manual Disclaimer Limited WarrantyTrademark and Service Mark Notice Copyright InformationRegulatory Compliance Page Contents Using EZ-KIT Lite ADSP-21369 EZ-KIT Lite Evaluation System Manual Vii Bill of Materials Schematics Index Preface Page Preface Page Manual Contents Purpose of This ManualIntended Audience What’s New in This Manual Technical or Customer SupportWhat’s New in This Manual Product Information Supported ProcessorsMyAnalog.com Processor Product InformationProduct Information Title Description Related DocumentsEach documentation file type is described as follows Online Technical DocumentationAccessing Documentation From VisualDSP++ Accessing Documentation From WindowsAccessing Documentation From Web Processor Manuals Printed ManualsVisualDSP++ Documentation Set Hardware Tools ManualsPreface Data Sheets Notation Conventions Notation ConventionsPreface Xxiv ADSP-21369 EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Package Contents Using EZ-KIT Lite Default ConfigurationInstallation and Session Startup Installation and Session StartupUsing EZ-KIT Lite Evaluation License Restrictions Evaluation License RestrictionsExternal Memory Start Address End Address ContentElvis Interface Elvis InterfaceAnalog Audio LEDs and Push Buttons LEDs and Push ButtonsPB1 SW8 FLAG1/~IRQ1 PB2 Example Programs Background Telemetry ChannelExample Programs Sors/resources/crosscore/emulators/index.html. For more Background Telemetry Channel EZ-KIT Lite Hardware Reference System Architecture System ArchitectureEZ-KIT Lite Hardware Reference External PortDAI Interface ADSP-21369 DPI InterfaceFlag Pins Expansion Interface External PLLJtag Emulation Port Switch SettingsBoot Mode and Clock Ratio Select Switch SW2 Switch SettingsOFF Core Clock Rate Configuration Codec Setup Switch SW3Uart Enable Switch SW5 Electret Microphone Select Switch SW4Push Button Enable Switch SW7 Loop-Back Test Switches SW6 and SW14Elvis Function Generator Configuration Switch SW13 Elvis Oscilloscope Configuration Switch SW1General Purpose LEDs LED1-8 Power LED LED9LED and Push Button Locations Reset LEDs LED10 and LED12Push Buttons SW8-11 USB Monitor LED LED11Board Reset Push Button SW12 JumpersVCO Select Jumper JP1 Jumper Locations 10. VCO Select Jumper JP1 JumpersElvis Voltage Selection Jumper JP3 Elvis Select Jumper JP2Elvis Programmable Flag Jumper JP4 ConnectorsExpansion Interface Connectors J1-J3 ConnectorsConnector Locations Headphone Out Jack P7 Audio In RCA Connector P10 Audio Out RCA Connector J5 Power Jack J4Spdif Coax Connectors P8 and P9 RS-232 Connector P1USB Connector P5 DPI Header P3DAI Header P4 Jtag Header P2 Connectors Bill of Materials Description Reference Designator Manufacturer Part Number Bill Of Materials VR5 ADI Switchcraft PJRAN1X1U01 BLK SPST-MOMENTARY SWT013 2A S2ARECT DO-214AA Panasonic ERJ-2GEJ472X DIGI-KEY P1.5KCFCT-ND Yageo ERJ-3RSFR10V Panasonic ECJ-1VC1H101J RED-SMT LED001 LED10,LED12 Panasonic ADSP-21369 EZ-KIT Lite Evaluation System Manual ADSP-21369 EZ-KIT Lite Schematic Devices DSP Memory Analog Audio Audio OUT DAC3 Left Audio in & Headphone OUT Analog DSP IO Current PUSHBUTTONS, LEDS, & Reset Expansion Interface Power Index Index Jtag SPI