HP dc7800 manual Processor/Memory Subsystem, System Support, Input/Output Interfaces

Page 4

Contents

3 Processor/Memory Subsystem

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1

3.2 Intel Processors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2

3.2.1 Intel Processor Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2

3.2.2 Processor Changing/Upgrading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3

3.3 Memory Subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4

3.3.1 Memory Upgrading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5

3.3.2 Memory Mapping and Pre-allocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5

4 System Support

4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–1

4.2 PCI Bus Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–1

4.2.1 PCI 2.3 Bus Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–1

4.2.2 PCI Express Bus Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3

4.2.3 Option ROM Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–4

4.2.4 PCI Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–4

4.2.5 PCI Power Management Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–4

4.2.6 PCI Connectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–5

4.3 System Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–7

4.3.1 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–7

4.3.2 Direct Memory Access. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–8

4.4 Real-Time Clock and Configuration Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9

4.4.1 Clearing CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9

4.4.2 Standard CMOS Locations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–10

4.5 System Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–10

4.5.1 Security Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–10

4.5.2 Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–12

4.5.3 System Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–12

4.5.4 Thermal Sensing and Cooling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–13

4.6 Register Map and Miscellaneous Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–14

4.6.1 System I/O Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–14

4.6.2 GPIO Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–15

5 Input/Output Interfaces

5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–1

5.2 SATA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–2

5.3 PATA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–3

5.4 Diskette Drive Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–4

5.5 Serial Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–6

5.6 Parallel Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–7

5.6.1 Standard Parallel Port Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–7

5.6.2 Enhanced Parallel Port Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–7

5.6.3 Extended Capabilities Port Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–7

5.6.4 Parallel Interface Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–8

5.7 Keyboard/Pointing Device Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–9

5.7.1 Keyboard Interface Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–9

5.7.2 Pointing Device Interface Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5–10

 

iv

www.hp.com

Technical Reference Guide

Image 4
Contents Technical Reference Guide OctoberTechnical Reference Guide Contents System Support Processor/Memory SubsystemInput/Output Interfaces Power and Signal Distribution Integrated Graphics SubsystemSystem Bios Error Messages and Codes IndexAbout this Guide Additional Information SourcesModel Numbering Convention Online ViewingIntroduction Serial Number Notational ConventionsSpecial Notices ValuesCommon Acronyms and Abbreviations Acronyms and Abbreviations Acronym or DescriptionCMC CmosCPQ CPUEscd FifoFPM FPUAcronyms and Abbreviations Acronym or Abbreviation DescriptionPCA PCIPCI-E PCMSgram SimdSimm SmartVAC VDCVesa VGASystem Overview IntroductionFeatures Sodimm Dimm Feature Difference Matrix by Form Factor4GB 8GB Architectural Differences By Form Factor System ArchitectureFunction HP Comapq dc7800 Business PC Architecture, Block diagram Intel Processor Support Chipset Components and Functionality ChipsetComponents Function Support Components System MemorySupport Component Functions Component Name FunctionMass Storage Serial and Parallel InterfacesUniversal Serial Bus Interface Network Interface ControllerGraphics Subsystem Audio SubsystemIntegrated Graphics Subsystem Statistics Integrated Graphics ControllerSpecifications Environmental Specifications Factory ConfigurationPower Supply Electrical Specifications Parameter Operating Non-operatingPhysical Specifications Parameter Usdt SFF CMTDiskette Drive Specifications Parameter MeasurementOptical Drive Specifications DVD/CD-RW SuperMultiParameter CD-RW/DVD-ROM Combo LightScribe ComboHard Drive Specifications Parameter 80 GB 160 GB 250 GBSystem Overview Processor/Memory Subsystem Intel Processors Intel Processor OverviewProcessor Changing/Upgrading Supported ProcessorsClock FormMemory Subsystem Memory Upgrading Memory Mapping and Pre-allocationMemory Socket Loading Channel a Channel B Socket Socket 2 Socket 4 TotalSystem Memory Map for maximum of 8 gigabytes PCI Bus Overview PCI 2.3 Bus OperationPCI Component Configuration Access PCI Bus PCI Component Function # Device # Wired toPCI Express Bus Operation Software/Driver LayerTransaction Protocol Layer PCI Bus Mastering DevicesPCI Power Management Support Option ROM MappingPCI Interrupts Link LayerPCI 2.3 Connector PCI ConnectorsPCI 2.3 Bus Connector Pinout PCI Express Connectors PCI Express Bus Connector PinoutApic Mode System ResourcesInterrupts ModeDirect Memory Access Connector PCI slot 1 PCI slot 2 PCI slot 3PCI Interrupt Distribution System Interrupts System BoardReal-Time Clock and Configuration Memory Clearing CmosConfiguration Memory Cmos Map System ManagementStandard Cmos Locations Security FunctionsPower-On / Setup Password Setup PasswordCable Lock Provision Interface SecurityPower Management Smart Cover Lock OptionalAcpi Wake-Up Events Acpi Wake-Up Event System Wakes FromSystem Status PowerLED Beeps Action Required System StatusThermal Sensing and Cooling System Operational Status LED IndicationsRegister Map and Miscellaneous Functions System I/O MapICH9 Functions Gpio FunctionsSystem I/O Map Controller Functions Input/Output Interfaces Sata Interface Pin Sata Connector PinoutPin Description Pin Signal Pin Slim IDE Connector PinoutPata Interface Diskette Drive Interface Pin Diskette Drive Connector Pinout Pin Signal DescriptionDB-9 Serial Connector Pinout Serial InterfaceStandard Parallel Port Mode Enhanced Parallel Port ModeExtended Capabilities Port Mode Parallel InterfaceDB-25 Parallel Connector Pinout Parallel Interface ConnectorPin Signal Function Keyboard/Pointing Device Interface Keyboard Interface OperationKeyboard/Pointing Device Interface Connector Keyboard/Pointing Device Connector PinoutPointing Device Interface Operation DataUSB Connector USB Connector LocationController Signals USDT, SFF Form Factors CMT Form Factor Universal Serial Bus InterfaceUSB Connector Pinout USB Cable DataUSB Cable Length Data USB Color CodeAudio Subsystem Functional Block Diagram Audio SubsystemHD Audio Link Bus HD Audio ControllerAudio Multistreaming HD Audio Subsystem Specifications Audio SpecificationsADC/DAC Network Interface Controller LAN I/F NICWake-On-LAN Support Power Management SupportAlert Standard Format Support NIC Connector NIC SpecificationsNIC Specifications Parameter Compatibility standard orprotocolIntegrated Graphics Subsystem Q35 IGC, Block diagram Functional DescriptionSdram Installed Maximum Memory Allocation IGC Standard 2D Display ModesResolution Maximum Refresh Rate Analog Digital Monitor Display ModesUpgrading Analog Monitor Connector Monitor ConnectorsDB-15 Monitor Connector Pinout Digital Monitor Connector Integrated Graphics Subsystem Power Distribution Usdt Power DistributionSFF Power Distribution Usdt 135-Watt Power Supply Unit SpecificationsSFF 240-Watt Power Supply Unit Specifications Min Range Current Max Surge Tolerance Loading RippleCMT 365-Watt Power Supply Unit Specifications CMT Power DistributionRange or Min Current Max Surge Tolerance Loading Ripple Shows the power supply cabling for CMT systems Energy Star CompliancyPower Control Power ButtonPower Button Actions Pressed Power Button ResultsPower Button Actions Power LED Condition Wake Up Events Wake-On-LANSystem Power States Power Transition OS RestartState System Condition Consumption To S0 by RequiredSignal Distribution CR1 +5 VDC LEDSystem Board Component Designations Power and Signal Distribution System Bios Upgrading ROM FlashingChangeable Splash Screen Boot Functions Boot Device OrderNetwork Boot F12 Support Memory Detection and ConfigurationBoot Error Codes Boot Error CodesVisual power LED Audible speaker Meaning Client Management Functions Function ModeClient Management Functions INT15 Temperature Status Drive Fault PredictionSystem ID and ROM Type System ID NumbersSmbios Type DataUSB Legacy Support Management Engine FunctionsIndex NumericsIndex
Related manuals
Manual 49 pages 53.5 Kb