RF CIRCUITS PLL SYNTHESIZER
12.8 MHz TCXO
The TCXO contains the
PLL IC Dual Modules Prescaler
Input frequency of 12.8 MHzto IC2 MC14519 pin 20 is divided to 6.25 kHz or 5 kHz by the reference counter, and then supplied to comparator. RF signal input from VCO is divided to 1/64 at prescaler in IC2, Divided by A and N counter in IC2 to determine frequency steps, and then sup- plied to the comparator. PLL comparison frequency is 6.25/5 kHz so that minimum programmable frequency step is 5/
6.25kHz. A and N counter is programmed to obtain the desired frequency by serial data in CPU. In comparator, the phase difference between reference and VCO signals is com- pared. When the phase of reference frequency is leading, Fr is output, but when VCO frequency is leading, Fv is the out- put. When Fv=Fr, phase detector out is very small 0v pulse. 64/65 modulus prescaler is comprised in IC2, and has two output ports:
Port A pin 16: tx enable 2
Port B pin 15: prescaler power save control in PLL IC pin 13 labeled test2 allows the technician to see the output of the dual modules
Level Shifter & Charge Pump
The charge pump is used for changing output signals Fr, Fv at PLL IC from
Reference Frequency LPF
The Loop Filter contains R12, C21 and C22. LPF settling time is 12 mS with 1 kHz frequency. This also reduces the residual
DC to DC Converter
The DC to DC converter converts the 5v to
VCO
The VCO consist of an RX VCO and TX VCO. Is switched TX/RX by power source. It is configured as a colpits oscilla- tor and connected to buffer as cascade bias in order to save power.
The varicap diode D201/D301 are
MAXON
for the
RECEIVER
Front End
The receive signal is routed backward through the low pass filter, then onward to Pin 1 of the Hybrid Receiver Front End Module to a bandpass filter consisting of (VHF C622 through C608, L607 through L604) and (UHF C601 through C610, L601 through L603) is coupled to the base of Q601 which serves as an RF amplifier. Diode D601 serves as pro- tection from static RF overload from nearby transmitters. The output of Q601 is then coupled to a second bandpass fil- ter consisting of (VHF C607 through C601, L603 through L601) and (UHF C612 through C623 and L604 through
L607). The output of Pin 6 is then coupled to the doubly bal- anced mixer D9. The receiver front end module is factory
1.RF Input
2.Input Ground
3.N/A
4.Receive +5V
5.Ground
6.Output
First Mixer
D9, T2 and T3 are double balanced mixers which provide the 45.1 MHz intermediate frequency output. The filtered frequency from the front end module is coupled to T2. The
45.1MHz IF output is matched to the input of the
Second Oscillator Mixer Limiter And FM Detector
The output of the post filter amplifier, Q25, is coupled, via C98 to the input of IC5 (MC3371). IC5 is a monolithic sin- gle conversion FM transceiver, containing a mixer, the sec- ond local oscillator, limiter and quadrature detector. Crystal X1 44.645 MHz is used to provide resultant 455 kHz signal from the output of the second mixer. The mixer output is then routed to CF1 (455F) or CF2 (455HT). These ceramic
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