Texas Instruments SLAU081 manual Legacy Connector, Host Connector Pin No Signal

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Host Communication

2.6.2Legacy Connector

J12, J13, and J15 are three 2x20 headers daisy-chained together and are collectively referred to as the legacy connector. The principle behind this arrangement is to eliminate the confused and untidy custom cabling that is typically present when connecting a legacy DSP to an EVM. This daisy-chained connector method is flexible, robust, and makes it possible to use a standard flat signal-cable assembly, improving reliability of communications between host and EVM.

Two shorting bars are inserted in J12 and J15; these bars permit alternate pins on J13 to be DGND. If the user has complete discretion over signal routing at the host end, it is recommended that the host-end connector should reflect the same pinout as J13.

However, if the host-end connector does not (or cannot) mirror the pinout for J13, then some degree of signal-twisting is necessary. This is accomplished on the EVM by removing the shorting bars on J12 and J15 and typically wire-wrapping directly onto the appropriate header.

For example, if the host connector on the DSP has the pin assignment described in the following table, then a 1:1 mapping is possible and the user should plug a flat 20-way ribbon cable into J13.

Host Connector

Pin No.

Signal

Pin No.

Signal

 

 

 

 

1

XF

2

DGND

 

 

 

 

3

CLKX

4

DGND

 

 

 

 

5

CLKR

6

DGND

 

 

 

 

7

DX

8

DGND

 

 

 

 

9

DR

10

DGND

 

 

 

 

11

FSX

12

DGND

 

 

 

 

13

FSR

14

DGND

 

 

 

 

15

Resvd

16

DGND

 

 

 

 

17

CLKS

18

DGND

 

 

 

 

19

TOUT

20

DGND

 

 

 

 

EVM Connector – J13

Pin No.

Signal

Pin No.

Signal

 

 

 

 

1

XF

2

DGND

 

 

 

 

3

CLKX

4

DGND

 

 

 

 

5

CLKR

6

DGND

 

 

 

 

7

DX

8

DGND

 

 

 

 

9

DR

10

DGND

 

 

 

 

11

FSX

12

DGND

 

 

 

 

13

FSR

14

DGND

 

 

 

 

15

Resvd

16

DGND

 

 

 

 

17

CLKS

18

DGND

 

 

 

 

19

TOUT

20

DGND

 

 

 

 

However, if the host connector has a different signal pinout, the user should remove the shorting bars from J12 and J15. A flat 20-way IDC ribbon cable can still be used; in this case, the user should plug the connector into J12 of the EVM. Since the cable is now plugged into J12, and all the signals on both sides of the J12 pins are routed to adjacent connector pins (J13 and J15), the user can typically wire-wrap the associated host signal to the relevant EVM signal.

The example shown below demonstrates the steps that must be taken to reassign the connector and wire-wrap the correct signals.

2-14

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Contents User’s Guide Important Notice EVM Important Notice EVM Warnings and Restrictions Contents Figures Introduction EVM Modes Stand-Alone Mode SAMAnalog Output Conditioning Stand-Alone ModeUser Mode Analog Input ConditioningGetting Started SAM Configuration Shipping Default ConfigurationDefault Configuration Description Switch SettingsDefault Description Configuration Jumper SettingsChannel 0 Analog Input Analog I/O Signal ConditioningJumpers ADC Supply Voltage Signal GeneratorChannel 0 Analog Output Voltage ReferenceStand-Alone-Mode, SW1-1 SwitchesClock/Timer Routing Evaluation board, SIL ConnectorsReference Description Pin Function Designator Number Agnd EVM power Analog output option No output Pin DIL header Evaluation board, SIL Host Communication ADC and DAC Direct AccessReference Description Pin Signal Designator Number Common Connector FSX EVM Connector J13 Pin No Signal Legacy ConnectorHost Connector Pin No Signal J13 Host Connector Plugged into J12 J15 Pin No Signal J13 Pin No SignalJ13 Pin No Signal J15 Wire Wrap J13 Jumper J13 Wire WrapAll of these connectors are shown below Description Pin Signal Name/Function Designator Number Pin connector J12 pin Bill of Materials, Board Layout, and Schematics Dspclkr BNC0 DspclksDspxf DspclkxRefin FL2 +VS+VIN GND FL3FB2 ENA OUT FB3BLM11A121SGPB +VIN TP9Trim RV9GND RV7 SDO Agnd VDDA2OUT Dacout OUT/OUTBAOUTW19 AOUTAW15 A2FLTDacout OutaRV8 BLM11A121SGPB FB4 FSR ClkxClkr FB5 FSXDsptout Dsptout Sysclk DspclksEvmclkx Dspclkx Dspfsr DspclkrAdctc Sysclk ResetAdccs Dspdx EvmclkxTP6 TP7RV4 TP5RV3 U4ATP3 TP4 PT1 TP1 TP2RV1 RV2