Texas Instruments SLAU081 manual Agnd VDD, Sdo

Page 35

D

C

1

2

 

 

+AVdd

 

 

 

 

C22

 

 

 

 

 

0.1uF

 

 

 

 

 

C19

 

 

 

 

 

10uF

 

SENSE

 

R19

ADC_REF

 

 

 

 

 

 

 

0

 

 

 

 

 

 

 

 

VREFP

 

 

 

 

 

 

C23

C14

2

3

6

 

10uF

0.1uF

 

 

 

 

 

AIN0

4

Vref

AGND

VDD

In_0

AIN or AIN0 or AIN(+)

 

 

 

 

 

 

2

040500

5(9

5HYLVLRQ￿+LVWRU\

$SSURYHG

3

 

(&1￿1XPEHU

 

 

4

 

C47

0.01uF

ADC_REF

 

 

2

3

6

 

 

 

 

 

AIN0

4

 

 

 

 

U501

 

 

 

 

 

 

 

 

8

 

 

AIN1

5

MSOP ADC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

+DVdd

U5

 

7

 

1

 

 

 

 

 

 

 

 

 

 

 

R10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10K

D

C

B

AIN1 5

In_1

W10

SOCKETED ADC

orFSSCLK

orCS*CS*/FS

SCLK or AIN1 or AIN(-)

 

7

1

SDO

8

 

C1

 

100pF

J10

 

1

2

3

4

5

6

7

8

ADC_Data_out

LCL_CLKX

B

A

W12

LCL_CS_ADC*

FS

 

 

 

 

 

 

 

 

 

 

 

 

 

￿￿

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12500 TI Boulevard. Dallas, Texas 75243

 

 

 

 

 

 

 

 

 

 

 

 

 

TITLE:

 

 

 

 

 

 

 

ADC

 

 

 

Engineer:

Joe Purvis

 

 

 

 

 

 

 

 

DOCUMENT CONTROL #:

 

 

REV:

Drawn By:

Joe Purvis

6430333

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FILE: ADC

 

DATE: 28-Nov-2001

SIZE:

A4

SHEET: 5

OF: 14

 

 

 

 

 

 

 

A

1

2

 

 

3

4

 

 

Image 35
Contents User’s Guide Important Notice EVM Important Notice EVM Warnings and Restrictions Contents Figures Introduction EVM Modes Stand-Alone Mode SAMAnalog Output Conditioning Stand-Alone ModeUser Mode Analog Input ConditioningGetting Started SAM Configuration Shipping Default ConfigurationDefault Configuration Description Switch SettingsDefault Description Configuration Jumper SettingsChannel 0 Analog Input Analog I/O Signal ConditioningJumpers ADC Supply Voltage Signal GeneratorChannel 0 Analog Output Voltage ReferenceStand-Alone-Mode, SW1-1 SwitchesClock/Timer Routing Evaluation board, SIL ConnectorsReference Description Pin Function Designator Number Agnd EVM power Analog output option No output Pin DIL header Evaluation board, SIL Host Communication ADC and DAC Direct AccessReference Description Pin Signal Designator Number Common Connector FSX EVM Connector J13 Pin No Signal Legacy ConnectorHost Connector Pin No Signal J13 Host Connector Plugged into J12 J15 Pin No Signal J13 Pin No SignalJ13 Pin No Signal J15 Wire Wrap J13 Jumper J13 Wire WrapAll of these connectors are shown below Description Pin Signal Name/Function Designator Number Pin connector J12 pin Bill of Materials, Board Layout, and Schematics Dspclkr BNC0 DspclksDspxf DspclkxRefin FL2 +VS+VIN GND FL3FB2 ENA OUT FB3BLM11A121SGPB +VIN TP9Trim RV9GND RV7 SDO Agnd VDDA2OUT Dacout OUT/OUTBAOUTW19 AOUTAW15 A2FLTDacout OutaRV8 BLM11A121SGPB FB4 FSR ClkxClkr FB5 FSXDsptout Dsptout Sysclk DspclksEvmclkx Dspclkx Dspfsr DspclkrAdctc Sysclk ResetAdccs Dspdx EvmclkxTP6 TP7RV4 TP5RV3 U4ATP3 TP4 PT1 TP1 TP2RV1 RV2