Texas Instruments SLAU081 manual J13 Wire Wrap, J15 Wire Wrap J13 Jumper

Page 26

Host Communication

All of the signals required to interface the EVM to the host are now available on either J13 or J15. This is simply a matter of wire-wrapping in the following way:

 

J13

Wire Wrap

J13

 

 

 

 

 

 

 

 

Pin No.

 

Signal

 

Pin No.

 

Signal

 

 

 

 

 

 

 

2

 

NA

 

 

 

 

 

 

 

 

 

 

 

4

 

NA

 

 

 

 

 

 

 

 

 

 

 

6

 

CLKX

 

3

 

CLKX

 

 

 

 

 

 

 

8

 

TOUT

 

19

 

TOUT

 

 

 

 

 

 

 

10

 

DX

 

7

 

DX

 

 

 

 

 

 

 

12

 

FSX

 

11

 

FSX

 

 

 

 

 

 

 

14

 

NA

 

 

 

 

 

 

 

 

 

 

 

16

 

XF

 

1

 

XF

 

 

 

 

 

 

 

18

 

NA

 

 

 

 

 

 

 

 

 

 

 

20

 

NA

 

 

 

 

 

 

 

 

 

 

 

J15

Wire Wrap

J13

Jumper

 

J15

 

 

 

 

 

 

Between

 

 

 

Pin No.

Signal

 

Pin No.

Signal

Pin No.

Signal

 

 

 

 

 

 

 

 

 

 

 

 

1

DGND

 

 

 

 

YES

2

 

DGND

 

 

 

 

 

 

 

 

 

 

3

DGND

 

 

 

 

YES

4

 

DGND

 

 

 

 

 

 

 

 

 

 

5

CLKR

YES

5

CLKR

 

 

6

 

DGND

 

 

 

 

 

 

 

 

 

 

7

DGND

 

 

 

 

YES

8

 

DGND

 

 

 

 

 

 

 

 

 

 

9

DR

YES

9

DR

 

 

10

 

DGND

 

 

 

 

 

 

 

 

 

 

11

FSR

YES

13

FSR

 

 

12

 

DGND

 

 

 

 

 

 

 

 

 

 

13

DGND

 

 

 

 

YES

14

 

DGND

 

 

 

 

 

 

 

 

 

 

15

DGND

 

 

 

 

YES

16

 

DGND

 

 

 

 

 

 

 

 

 

 

17

NA

 

 

 

 

 

18

 

DGND

 

 

 

 

 

 

 

 

 

19

CLKS

YES

17

CLKS

 

 

20

 

DGND

 

 

 

 

 

 

 

 

 

 

Getting Started

2-17

 

Image 26
Contents User’s Guide Important Notice EVM Important Notice EVM Warnings and Restrictions Contents Figures Introduction Stand-Alone Mode SAM EVM ModesAnalog Input Conditioning Stand-Alone ModeUser Mode Analog Output ConditioningGetting Started Shipping Default Configuration SAM ConfigurationJumper Settings Switch SettingsDefault Description Configuration Default Configuration DescriptionChannel 0 Analog Input Analog I/O Signal ConditioningJumpers Voltage Reference Signal GeneratorChannel 0 Analog Output ADC Supply VoltageStand-Alone-Mode, SW1-1 SwitchesClock/Timer Routing Evaluation board, SIL ConnectorsReference Description Pin Function Designator Number Agnd EVM power Analog output option No output Pin DIL header Evaluation board, SIL Host Communication ADC and DAC Direct AccessReference Description Pin Signal Designator Number Common Connector FSX EVM Connector J13 Pin No Signal Legacy ConnectorHost Connector Pin No Signal J13 Host Connector Plugged into J12 J15 Pin No Signal J13 Pin No SignalJ13 Pin No Signal J13 Wire Wrap J15 Wire Wrap J13 JumperAll of these connectors are shown below Description Pin Signal Name/Function Designator Number Pin connector J12 pin Bill of Materials, Board Layout, and Schematics Dspclkx BNC0 DspclksDspxf DspclkrGND FL3 FL2 +VS+VIN Refin+VIN TP9 FB3BLM11A121SGPB FB2 ENA OUTTrim RV9GND RV7 Agnd VDD SDOA2FLT Dacout OUT/OUTBAOUTW19 AOUTAW15 A2OUTDacout OutaRV8 FB5 FSX ClkxClkr BLM11A121SGPB FB4 FSRDspclkx Dspfsr Dspclkr Dsptout Sysclk DspclksEvmclkx DsptoutDspdx Evmclkx ResetAdccs Adctc SysclkTP7 TP6U4A TP5RV3 RV4TP1 TP2 TP3 TP4 PT1RV2 RV1