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Version December 31 MCS Logic Inc MLN7400 Evaluation Board ManualCost Effective Network Processor for TCP/IP with ARM7TDMI Copyright 2003 MCS LOGIC Limited. All rights reserved EVB7400 Revision HistoryRevision Description Version 3/36 Table of Contents 4.2.1Downloading Binary Image 4.2.2 EVB7400 BLOCK DIAGRAM BLOCK DIAGRAM TOP VIEWPROPERTIES SETTING PAGE CHOOSE SETTING PAGE 1.1 System Requirements Chapter 1 IntroductionFi gu re ADDRESS 1.2 Board Components Fi gu re 3 BLOCK DIAGRAM TOP VIEW A Flash ROM External Timer0 Clock External Interrrupt Key Chapter 2 Board Configuration 2.2 Boot ROM and ROM Bank0 length Selection SW22.1 Endian Selection SW1 2.3 NAND FLASH 2.4 GPIO Setting 128-TQFP/ 144 -LQFP Common I/O144 -LQFP Extended I/O 선택적으로 사용 3.1 Ethernet 10/100 BASE-T Connector Chapter 3 Setup EVB7400 Environments3.2 Connection Method for UTP Cable Fi gu re 4 UTP CABLE CONNECTION Chapter 4 Connection Configurations for Debug Console 4.1 Configuration the Hyper Terminal 4.2 Downloading Binary Image and Flash Write 4.2.1 Downloading Binary Image 2. Type “8” at Flash Program Menu and type address to download 3. select the Send File from the Transfer menu File Name Select the file name, which you want too downloadProtocol Select the Xmodem or 1K Xmodem 4. Click Ok Then, the file that you selected will be downloaded 4.2.2 Flash Write Chapter 5 Opennice32 Installation 5.2 Connecting EVB7400 and PC5.3 Powering up the Board and OPENice32 5.1 OPENice32 Chapter 6 EVB7400 1.0 Schemetic and BOM 6.1 EVB7400 BOMGEOMETRY COUNT 22/36 23/36 6.2 EVB7400 Schematic MLN7400 Evaluation Board BLOCK DIAGRAMMLN7400EV Endian Setting OPTIONALLITTLE SYSTEM CLOCK MLN7400P128TQFP JUMP IIC EEPROM SPI EEPROMExternal Interrupt Test EXTINT FLASH MLN7400ENBANK2 SDRAM BANK pins 0f AC101L pin32 0f AC101LPlace close to Place close to UART0 UART1UART2 UART3 BANK3 PCMCIA INTERFACE JTAG CONNECTOR POWER LEDRESET SYSTEM 7 Pin Ground IIC & SPI HEADERDATA HIGH SPEED Enable DisableMUTE JACK AOUTR AOUTLAOUTR S AOUTL S NANDFlash MLN7400