Introduction, System Requirements, EVB7400, Fi gu re | ADC MLN7400

Chapter 1 Introduction

EVB7400

Chapter 1 Introduction

EVB7400 is a MLN7400 evaluation board and MCS-uClinux training kit that is suitable for code development and exploration of MN7400 with MCS-uClinux. It includes much of the hardware and software required completing your application development. It supports various function related with network, communication such as IIC, SPI, UART, 10/100 Ethernet, multimedia module such as sound DAC, storage media such as NAND FLASH memory module. Using the JTAG interface, you can debug the EVB7400 directly.

1.1System Requirements

-. Host computer : IBM compatible PC

-. EVB7400 (Evaluation Board for MLN7400) -. DC 5V Power

	JTAG			X-Tal/Osc
							UART0~4
	ARM7TDMI		I/F	PLL
	ARM7TDMI						IIC Serial

			M Bus
							EEPROM
	4KBytes					4 Console	&RTC
	4KBytes					4 Console
	Cache					UARTs
	Cache						SPI Serial
							SPI Serial
Ethernet						1 high-	EEPROM
Ethernet	10/100					speed
PHY	10/100					speed
(AC101L)	Ethernet	DMA				UART
	MAC		Bus				DAC(CS4340)
	MAC						DAC(CS4340)
			M			I2C
			M
Boot ROM	2ch GDMA				Bus	SPI	MIC IN
(ROM Bank0)							MIC IN
(ROM Bank0)
(ROM Bank1)				Peripheral	Peripheral	GPIOs	MATRIX
(ROM Bank1)				Peripheral	Peripheral	4 channel	MATRIX
User Flash							KEY
	Memory			Bridge		ADC
	Controller			Bridge
SRAM	Controller
SRAM						4 Timers	NAND Flash
(ROM Bank2)						4 Timers	NAND Flash
(ROM Bank2)
PCMCIA						WDT
PCMCIA							Status
Socket						DAC I/F	Status
Socket							LEDs
(ROM Bank3)							LEDs
(ROM Bank3)
						Interrupt	Eextenal
SDRAM						Controller	Eextenal
SDRAM						Controller	Interrupt Key
							Interrupt Key
		[ Fi gu re 1 ]		EVB7400 BLOCK DIAGRAM
User’s Manual V.0.10							6/36

Copyright © 2004 MCS LOGIC Limited. All rights reserved

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ADC MLN7400 Introduction, System Requirements, EVB7400, Fi gu re, Copyright 2004 MCS LOGIC Limited. All rights reserved

Contents

Cost Effective Network Processor for TCP/IP with ARM7TDMI Version December 31 MCS Logic IncMLN7400 Evaluation Board Manual Copyright 2003 MCS LOGIC Limited. All rights reserved Revision Description EVB7400Revision History Version 3/36 Downloading Binary Image Table of Contents4.2.1 4.2.2 PROPERTIES SETTING PAGE EVB7400 BLOCK DIAGRAMBLOCK DIAGRAM TOP VIEW CHOOSE SETTING PAGE Chapter 1 Introduction 1.1 System RequirementsFi gu re ADDRESS 1.2 Board Components Fi gu re 3 BLOCK DIAGRAM TOP VIEW A Flash ROM External Timer0 Clock External Interrrupt Key 2.1 Endian Selection SW1 Chapter 2 Board Configuration2.2 Boot ROM and ROM Bank0 length Selection SW2 2.3 NAND FLASH 144 -LQFP Extended I/O 2.4 GPIO Setting128-TQFP/ 144 -LQFP Common I/O 선택적으로 사용 Chapter 3 Setup EVB7400 Environments 3.1 Ethernet 10/100 BASE-T Connector3.2 Connection Method for UTP Cable Fi gu re 4 UTP CABLE CONNECTION Chapter 4 Connection Configurations for Debug Console 4.1 Configuration the Hyper Terminal 4.2 Downloading Binary Image and Flash Write 4.2.1 Downloading Binary Image 2. Type “8” at Flash Program Menu and type address to download Protocol Select the Xmodem or 1K Xmodem 4. Click Ok 3. select the Send File from the Transfer menuFile Name Select the file name, which you want too download Then, the file that you selected will be downloaded 4.2.2 Flash Write 5.3 Powering up the Board and OPENice32 Chapter 5 Opennice32 Installation5.2 Connecting EVB7400 and PC 5.1 OPENice32 GEOMETRY Chapter 6 EVB7400 1.0 Schemetic and BOM6.1 EVB7400 BOM COUNT 22/36 23/36 6.2 EVB7400 Schematic BLOCK DIAGRAM MLN7400 Evaluation BoardMLN7400EV LITTLE Endian SettingOPTIONAL SYSTEM CLOCK MLN7400P128TQFP JUMP External Interrupt Test IIC EEPROMSPI EEPROM EXTINT BANK2 FLASHMLN7400EN SDRAM BANK Place close to pins 0f AC101Lpin32 0f AC101L Place close to UART2 UART0UART1 UART3 BANK3 PCMCIA INTERFACE RESET SYSTEM JTAG CONNECTORPOWER LED 7 Pin Ground DATA IIC & SPIHEADER HIGH SPEED MUTE EnableDisable JACK AOUTR S AOUTRAOUTL AOUTL S NANDFlash MLN7400