Allied Telesis AT-2972LX10/LC A2. Control Register Test, A3. Interrupt Test, B1. Scratch Pad Test

AT-2900 Series Gigabit Ethernet Network Adapters Installation Guide

MAC hash Register table and read back for verification. The memory read/ write is done 100 times while increment test data.

Default: Test Enabled

A2. Control Register Test

Function: Each Register specified in the configuration contents read only bit and read/write bit defines. The test writing zero and one into the test bits to insure the read only bits are not changed, and read/write bits are changed accordingly.

Default: Test Enabled.

A3. Interrupt Test

Function: This test verifies the interrupt functionality. It enables interrupt and waits for interrupt to occur. It waits for 500ms and reports error if could not generate interrupts.

Default: Enabled

A4. BIST

Function: Hardware Built-In-Self-Test (BIST). This test initiates BIST and waits for the test result returned by hardware.

Default: Due to the intermittent failure, this test is currently disabled by default.

A5. PCI Cfg Register Test

Function: This test verifies the access integrity of the PCI config registers.

B1. Scratch Pad Test

Function: This test tests the scratch pad SRAM on board. The following tests are performed:

Data Pattern Test: Writes test data into the SRAM and reads it back to ensure data is correct. The test data used is 0x00000000, 0xFFFFFFFF, 0xAA55AA55, and 0x55AA55AA.

Alternate Data Pattern Test: Writes test data into the SRAM. Writes complement test data into the next address. Reads back both to insure the data is correct. After the test, the program reads back data one more time to insure the data stays correct. The test data used is 0x00000000, 0xFFFFFFFF, 0xAA55AA55, and 0x55AA55AA.

Address Test: Writes each address with unique increment data. Read back data to insure data is correct. After fill the entire data with the unique

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