4.4.2CPU Configuration
The items in this menu show the
CPU Configuration |
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| Sets the ratio | |
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|
|
| between CPU Core |
AMD Engineering Sample |
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| Clock and the FSB | |
Revision: F2 |
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| Frequency. | |
Cache L1: 128KB |
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| NOTE: If an invalid | |
Cache L2: 2048KB |
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| ratio is set in CMOS | |
Speed | : 2815MHz |
|
| then actual and |
Current FSB Multiplier: 14x |
| setpoint values may | ||
Maximum FSB Multiplier: 25x |
| differ. | ||
Able to Change Freq. | : Yes |
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| |
uCode Patch Level | : None Required |
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GART Error Reporting |
| [Disabled] |
GART Error Reporting [Disabled]
Allows you to enable or disable GART error checking for testing purpose. Configuration options: [Disabled] [Enabled]
ASUS |