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4.4.4 Chipset
The Chipset menu allows you to change the advanced chipset settings. Select an item then press <Enter> to display the
Advanced Chipset Settings |
| Enable or disable | |
Configure DRAM Timing | by SPD | [Enabled] | DRAM timing. |
Boot Graphic Adapter | Priori | [PCI Express/PCI] |
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Select Screen
Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
Advanced Chipset Settings
Configure DRAM Timing by SPD [Enabled]![](/images/new-backgrounds/1272783/272783167xi2.webp)
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When this item is enabled, the DRAM timing parameters are set according to the DRAM SPD (Serial Presence Detect). When disabled, you can manually set the DRAM timing parameters through the DRAM
Configuration options: [Disabled] [Enabled]
DRAM CAS# Latency [5 Clocks]
Controls the latency between the SDRAM read command and the time the data actually becomes available.
Configuration options: [6 Clock] [5 Clocks] [4 Clocks] [3 Clocks]
DRAM RAS# Precharge [4 Clocks]
Controls the idle clocks after issuing a precharge command to the DDR SDRAM. Configuration options: [2 Clocks] [3 Clocks] [4 Clocks]
[5 Clocks] [6 Clocks]
DRAM RAS# to CAS# Delay [4 Clocks]
Controls the latency between the DDR SDRAM active command and the read/write command. Configuration options: [2 Clocks] [3 Clocks] [4 Clocks] [5 Clocks] [6 Clocks]
DRAM RAS# Activate to Precharge Delay [15 Clocks] Configuration options: [4 Clocks] [5 Clocks] ~ [18 Clocks]
DRAM Write Recovery Time [4 Clocks]
Configuration options: [2 Clocks] [3 Clocks] [4 Clocks] [5 Clocks] [6 Clocks]
Chapter 4: BIOS setup |